CARME-M4 BSP  V1.5
Modules | Macros
DMA_Exported_Constants
STM32F4xx_StdPeriph_Driver » DMA
+ Collaboration diagram for DMA_Exported_Constants:

Modules

 DMA_channel
 
 DMA_data_transfer_direction
 
 DMA_data_buffer_size
 
 DMA_peripheral_incremented_mode
 
 DMA_memory_incremented_mode
 
 DMA_peripheral_data_size
 
 DMA_memory_data_size
 
 DMA_circular_normal_mode
 
 DMA_priority_level
 
 DMA_fifo_direct_mode
 
 DMA_fifo_threshold_level
 
 DMA_memory_burst
 
 DMA_peripheral_burst
 
 DMA_fifo_status_level
 
 DMA_flags_definition
 
 DMA_interrupt_enable_definitions
 
 DMA_interrupts_definitions
 
 DMA_peripheral_increment_offset
 
 DMA_flow_controller_definitions
 
 DMA_memory_targets_definitions
 

Macros

#define IS_DMA_ALL_PERIPH(PERIPH)
 
#define IS_DMA_ALL_CONTROLLER(CONTROLLER)
 

Detailed Description

Macro Definition Documentation

#define IS_DMA_ALL_CONTROLLER (   CONTROLLER)
Value:
(((CONTROLLER) == DMA1) || \
((CONTROLLER) == DMA2))

Definition at line 135 of file stm32f4xx_dma.h.

#define IS_DMA_ALL_PERIPH (   PERIPH)
Value:
(((PERIPH) == DMA1_Stream0) || \
((PERIPH) == DMA1_Stream1) || \
((PERIPH) == DMA1_Stream2) || \
((PERIPH) == DMA1_Stream3) || \
((PERIPH) == DMA1_Stream4) || \
((PERIPH) == DMA1_Stream5) || \
((PERIPH) == DMA1_Stream6) || \
((PERIPH) == DMA1_Stream7) || \
((PERIPH) == DMA2_Stream0) || \
((PERIPH) == DMA2_Stream1) || \
((PERIPH) == DMA2_Stream2) || \
((PERIPH) == DMA2_Stream3) || \
((PERIPH) == DMA2_Stream4) || \
((PERIPH) == DMA2_Stream5) || \
((PERIPH) == DMA2_Stream6) || \
((PERIPH) == DMA2_Stream7))

Definition at line 118 of file stm32f4xx_dma.h.