taster_interrupt.s

This example shows how to use Button0 from CARME-IO1 with interrupts.

/*
 * This example shows how to use Button0 from CARME-IO1 with interrupts.
 */

.syntax unified
.cpu cortex-m4
.thumb

.global main
.global EXTI9_5_IRQHandler
 
dowait:
    LDR     r0, =0xA037A0
dowaitloop:
    SUBS    r0, #1
    BNE     dowaitloop
    BX      lr

 main:
    /*
     * RCC
     */
    LDR     r1, =0x40023800     // RCC_BASE

    /* enable RCC for GPIOC */
    LDR     r3, [r1, #0x30]     // RCC->AHB1ENR
    LDR     r2, =0x4            // RCC_AHB1Periph_GPIOC
    ORR     r3, r3, r2          // RCC->AHB1ENR |= RCC_AHB1Periph_GPIOC
    STR     r3, [r1, #0x30]

    /* enable RCC for SYSCFG */
    LDR     r3, [r1, #0x44]     // RCC->APB2ENR
    LDR     r2, =0x4000         // RCC_APB2Periph_SYSCFG
    ORR     r3, r3, r2          // RCC->APB2ENR |= RCC_APB2Periph_SYSCFG
    STR     r3, [r1, #0x44]

    /*
     * GPIOC
     */
    LDR     r1, =0x40020800     // GPIOC_BASE

    /*
     * Port:  GPIOC
     * Pin:   GPIO_Pin_7
     * Mode:  Input
     * Speed: 2MHz
     * PuPd:  No PU/PD
     */

    /* GPIO port mode register */
    LDR     r3, [r1, #0x00]     // GPIOC->MODER
    LDR     r2, =0x0000C000
    BIC     r3, r3, r2          // GPIOC->MODER &= ~(GPIO_MODER_MODER0 << (GPIO_PinSource7 * 2));
    STR     r3, [r1, #0x00]

    /* GPIO port output type register */
    LDR     r3, [r1, #0x04]     // GPIOC->OTYPER
    LDR     r2, =0x00000080
    BIC     r3, r3, r2          // GPIOC->OTYPER &= !(1 << GPIO_PinSource7);
    STR     r3, [r1, #0x04]

    /* GPIO port output speed register */
    LDR     r3, [r1, #0x08]     // GPIOC->OSPEEDR
    LDR     r2, =0x0000C000
    BIC     r3, r3, r2          // GPIOC->OSPEEDR &= ~(0x03 << (GPIO_PinSource7 * 2));
    STR     r3, [r1, #0x08]

    /* GPIO port pull-up/pull-down register */
    LDR     r3, [r1, #0x0C]     // GPIOC->PUPDR
    LDR     r2, =0x0000C000
    BIC     r3, r3, r2          // GPIOC->PUPDR &= ~(0x03 << (GPIO_PinSource7 * 2));
    STR     r3, [r1, #0x0C]

    /*
     * SYSCFG
     */
    LDR     r1, =0x40013800     // SYSCFG_BASE

    /* SYSCFG external interrupt configuration register 2 */
    LDR     r3, [r1, #0x0C]     // SYSCFG->EXTICR2
    LDR     r2, =0x0000F000
    BIC     r3, r3, r2          // SYSCFG->EXTICR2 &= ~(((uint32_t) 0x0F) << (0x04 * (EXTI_PinSource7 & 0x03)));
    LDR     r2, =0x00002000
    ORR     r3, r3, r2          // SYSCFG->EXTICR2 |= (((uint32_t) EXTI_PortSourceGPIOC) << (0x04 * (EXTI_PinSource7 & 0x03)));
    STR     r3, [r1, #0x0C]

    /*
     * EXTI
     */
    LDR     r1, =0x40013C00     // EXTI_BASE
    LDR     r2, =0x00000080     // EXTI_Line7

    /* Interrupt mask register */
    LDR     r3, [r1, #0x00]     // EXTI->IMR
    ORR     r3, r3, r2          // EXTI->IMR |= EXTI_Line7;
    STR     r3, [r1, #0x0]

    /* Event mask register */
    LDR     r3, [r1, #0x04]     // EXTI->EMR
    BIC     r3, r3, r2          // EXTI->EMR &= ~EXTI_Line7;
    STR     r3, [r1, #0x04]

    /* Rising edge configuration */
    LDR     r3, [r1, #0x08]     // EXTI->RTSR
    BIC     r3, r3, r2          // EXTI->RTSR &= ~EXTI_Line7;
    STR     r3, [r1, #0x8]

    /* Falling edge configuration */
    LDR     r3, [r1, #0x0C]     // EXTI->FTSR
    ORR     r3, r3, r2          // EXTI->FTSR |= EXTI_Line7;
    STR     r3, [r1, #0x0C]

    /*
     * NVIC
     */
    LDR     r1, =0xE000E100     // NVIC_BASE

    LDR     r2, =0x08000000
    STR     r2, [r1, #0xC08]    // SCB->VTOR

    /* Interrupt priority registers */
    LDR     r3, [r1, #0x314]    // NVIC->IP[EXTI9_5_IRQn]
    LDR     r2, =0xFF000000
    BIC     r3, r3, r2
    LDR     r2, =0x40000000
    ORR     r3, r3, r2
    STR     r3, [r1, #0x314]

    /* Interrupt set-enable registers */
    LDR     r3, [r1, #0x00]     // NVIC->ISER0
    LDR     r2, =0x00800000     // EXTI9_5_IRQn
    ORR     r3, r3, r2          // NVIC->ISER0 |= 1 << EXTI9_5_IRQn
    STR     r3, [r1, #0x00]

 loop:
    BL      dowait
    B       loop

.type EXTI9_5_IRQHandler, %function
EXTI9_5_IRQHandler:
    LDR     r1, =0x40013C00     // EXTI_BASE
    LDR     r2, =0x00000080     // EXTI_Line7
    STR     r2, [r1, #0x14]     // EXTI->PR = EXTI_Line7
    BX      lr