Peripheral clocks configuration functions

Peripheral clocks configuration functions. More...

Collaboration diagram for Peripheral clocks configuration functions:

Functions
void	RCC_RTCCLKConfig (uint32_t RCC_RTCCLKSource)
	Configures the RTC clock (RTCCLK). More...
void	RCC_RTCCLKCmd (FunctionalState NewState)
	Enables or disables the RTC clock. More...
void	RCC_BackupResetCmd (FunctionalState NewState)
	Forces or releases the Backup domain reset. More...
void	RCC_I2SCLKConfig (uint32_t RCC_I2SCLKSource)
	Configures the I2S clock source (I2SCLK). More...
void	RCC_SAIPLLI2SClkDivConfig (uint32_t RCC_PLLI2SDivQ)
	Configures the SAI clock Divider coming from PLLI2S. More...
void	RCC_SAIPLLSAIClkDivConfig (uint32_t RCC_PLLSAIDivQ)
	Configures the SAI clock Divider coming from PLLSAI. More...
void	RCC_SAIBlockACLKConfig (uint32_t RCC_SAIBlockACLKSource)
	Configures SAI1BlockA clock source selection. More...
void	RCC_SAIBlockBCLKConfig (uint32_t RCC_SAIBlockBCLKSource)
	Configures SAI1BlockB clock source selection. More...
void	RCC_LTDCCLKDivConfig (uint32_t RCC_PLLSAIDivR)
	Configures the LTDC clock Divider coming from PLLSAI. More...
void	RCC_TIMCLKPresConfig (uint32_t RCC_TIMCLKPrescaler)
	Configures the Timers clocks prescalers selection. More...
void	RCC_AHB1PeriphClockCmd (uint32_t RCC_AHB1Periph, FunctionalState NewState)
	Enables or disables the AHB1 peripheral clock. More...
void	RCC_AHB2PeriphClockCmd (uint32_t RCC_AHB2Periph, FunctionalState NewState)
	Enables or disables the AHB2 peripheral clock. More...
void	RCC_AHB3PeriphClockCmd (uint32_t RCC_AHB3Periph, FunctionalState NewState)
	Enables or disables the AHB3 peripheral clock. More...
void	RCC_APB1PeriphClockCmd (uint32_t RCC_APB1Periph, FunctionalState NewState)
	Enables or disables the Low Speed APB (APB1) peripheral clock. More...
void	RCC_APB2PeriphClockCmd (uint32_t RCC_APB2Periph, FunctionalState NewState)
	Enables or disables the High Speed APB (APB2) peripheral clock. More...
void	RCC_AHB1PeriphResetCmd (uint32_t RCC_AHB1Periph, FunctionalState NewState)
	Forces or releases AHB1 peripheral reset. More...
void	RCC_AHB2PeriphResetCmd (uint32_t RCC_AHB2Periph, FunctionalState NewState)
	Forces or releases AHB2 peripheral reset. More...
void	RCC_AHB3PeriphResetCmd (uint32_t RCC_AHB3Periph, FunctionalState NewState)
	Forces or releases AHB3 peripheral reset. More...
void	RCC_APB1PeriphResetCmd (uint32_t RCC_APB1Periph, FunctionalState NewState)
	Forces or releases Low Speed APB (APB1) peripheral reset. More...
void	RCC_APB2PeriphResetCmd (uint32_t RCC_APB2Periph, FunctionalState NewState)
	Forces or releases High Speed APB (APB2) peripheral reset. More...
void	RCC_AHB1PeriphClockLPModeCmd (uint32_t RCC_AHB1Periph, FunctionalState NewState)
	Enables or disables the AHB1 peripheral clock during Low Power (Sleep) mode. More...
void	RCC_AHB2PeriphClockLPModeCmd (uint32_t RCC_AHB2Periph, FunctionalState NewState)
	Enables or disables the AHB2 peripheral clock during Low Power (Sleep) mode. More...
void	RCC_AHB3PeriphClockLPModeCmd (uint32_t RCC_AHB3Periph, FunctionalState NewState)
	Enables or disables the AHB3 peripheral clock during Low Power (Sleep) mode. More...
void	RCC_APB1PeriphClockLPModeCmd (uint32_t RCC_APB1Periph, FunctionalState NewState)
	Enables or disables the APB1 peripheral clock during Low Power (Sleep) mode. More...
void	RCC_APB2PeriphClockLPModeCmd (uint32_t RCC_APB2Periph, FunctionalState NewState)
	Enables or disables the APB2 peripheral clock during Low Power (Sleep) mode. More...

Detailed Description

Peripheral clocks configuration functions.

 ===============================================================================
              ##### Peripheral clocks configuration functions #####
 ===============================================================================  
    [..] This section provide functions allowing to configure the Peripheral clocks. 
  
      (#) The RTC clock which is derived from the LSI, LSE or HSE clock divided 
          by 2 to 31.
     
      (#) After restart from Reset or wakeup from STANDBY, all peripherals are off
          except internal SRAM, Flash and JTAG. Before to start using a peripheral 
          you have to enable its interface clock. You can do this using 
          RCC_AHBPeriphClockCmd(), RCC_APB2PeriphClockCmd() and RCC_APB1PeriphClockCmd() functions.

      (#) To reset the peripherals configuration (to the default state after device reset)
          you can use RCC_AHBPeriphResetCmd(), RCC_APB2PeriphResetCmd() and 
          RCC_APB1PeriphResetCmd() functions.
     
      (#) To further reduce power consumption in SLEEP mode the peripheral clocks 
          can be disabled prior to executing the WFI or WFE instructions. 
          You can do this using RCC_AHBPeriphClockLPModeCmd(), 
          RCC_APB2PeriphClockLPModeCmd() and RCC_APB1PeriphClockLPModeCmd() functions.  

Function Documentation

void RCC_AHB1PeriphClockCmd	(	uint32_t	RCC_AHB1Periph,
		FunctionalState	NewState
	)

Enables or disables the AHB1 peripheral clock.

Note

After reset, the peripheral clock (used for registers read/write access) is disabled and the application software has to enable this clock before using it.

Parameters

RCC_AHBPeriph

specifies the AHB1 peripheral to gates its clock. This parameter can be any combination of the following values: RCC_AHB1Periph_GPIOA: GPIOA clock RCC_AHB1Periph_GPIOB: GPIOB clock RCC_AHB1Periph_GPIOC: GPIOC clock RCC_AHB1Periph_GPIOD: GPIOD clock RCC_AHB1Periph_GPIOE: GPIOE clock RCC_AHB1Periph_GPIOF: GPIOF clock RCC_AHB1Periph_GPIOG: GPIOG clock RCC_AHB1Periph_GPIOG: GPIOG clock RCC_AHB1Periph_GPIOI: GPIOI clock RCC_AHB1Periph_GPIOJ: GPIOJ clock (STM32F42xxx/43xxx devices) RCC_AHB1Periph_GPIOK: GPIOK clock (STM32F42xxx/43xxx devices) RCC_AHB1Periph_CRC: CRC clock RCC_AHB1Periph_BKPSRAM: BKPSRAM interface clock RCC_AHB1Periph_CCMDATARAMEN CCM data RAM interface clock RCC_AHB1Periph_DMA1: DMA1 clock RCC_AHB1Periph_DMA2: DMA2 clock RCC_AHB1Periph_DMA2D: DMA2D clock (STM32F429xx/439xx devices) RCC_AHB1Periph_ETH_MAC: Ethernet MAC clock RCC_AHB1Periph_ETH_MAC_Tx: Ethernet Transmission clock RCC_AHB1Periph_ETH_MAC_Rx: Ethernet Reception clock RCC_AHB1Periph_ETH_MAC_PTP: Ethernet PTP clock RCC_AHB1Periph_OTG_HS: USB OTG HS clock RCC_AHB1Periph_OTG_HS_ULPI: USB OTG HS ULPI clock

NewState

new state of the specified peripheral clock. This parameter can be: ENABLE or DISABLE.

Return values

None

Definition at line 1460 of file stm32f4xx_rcc.c.

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void RCC_AHB1PeriphClockLPModeCmd	(	uint32_t	RCC_AHB1Periph,
		FunctionalState	NewState
	)

Enables or disables the AHB1 peripheral clock during Low Power (Sleep) mode.

Note

Peripheral clock gating in SLEEP mode can be used to further reduce power consumption.

After wakeup from SLEEP mode, the peripheral clock is enabled again.

By default, all peripheral clocks are enabled during SLEEP mode.

Parameters

RCC_AHBPeriph

specifies the AHB1 peripheral to gates its clock. This parameter can be any combination of the following values: RCC_AHB1Periph_GPIOA: GPIOA clock RCC_AHB1Periph_GPIOB: GPIOB clock RCC_AHB1Periph_GPIOC: GPIOC clock RCC_AHB1Periph_GPIOD: GPIOD clock RCC_AHB1Periph_GPIOE: GPIOE clock RCC_AHB1Periph_GPIOF: GPIOF clock RCC_AHB1Periph_GPIOG: GPIOG clock RCC_AHB1Periph_GPIOG: GPIOG clock RCC_AHB1Periph_GPIOI: GPIOI clock RCC_AHB1Periph_GPIOJ: GPIOJ clock (STM32F42xxx/43xxx devices) RCC_AHB1Periph_GPIOK: GPIOK clock (STM32F42xxx/43xxx devices) RCC_AHB1Periph_CRC: CRC clock RCC_AHB1Periph_BKPSRAM: BKPSRAM interface clock RCC_AHB1Periph_DMA1: DMA1 clock RCC_AHB1Periph_DMA2: DMA2 clock RCC_AHB1Periph_DMA2D: DMA2D clock (STM32F429xx/439xx devices) RCC_AHB1Periph_ETH_MAC: Ethernet MAC clock RCC_AHB1Periph_ETH_MAC_Tx: Ethernet Transmission clock RCC_AHB1Periph_ETH_MAC_Rx: Ethernet Reception clock RCC_AHB1Periph_ETH_MAC_PTP: Ethernet PTP clock RCC_AHB1Periph_OTG_HS: USB OTG HS clock RCC_AHB1Periph_OTG_HS_ULPI: USB OTG HS ULPI clock

NewState

new state of the specified peripheral clock. This parameter can be: ENABLE or DISABLE.

Return values

None

Definition at line 1852 of file stm32f4xx_rcc.c.

void RCC_AHB1PeriphResetCmd	(	uint32_t	RCC_AHB1Periph,
		FunctionalState	NewState
	)

Forces or releases AHB1 peripheral reset.

Parameters

RCC_AHB1Periph

specifies the AHB1 peripheral to reset. This parameter can be any combination of the following values: RCC_AHB1Periph_GPIOA: GPIOA clock RCC_AHB1Periph_GPIOB: GPIOB clock RCC_AHB1Periph_GPIOC: GPIOC clock RCC_AHB1Periph_GPIOD: GPIOD clock RCC_AHB1Periph_GPIOE: GPIOE clock RCC_AHB1Periph_GPIOF: GPIOF clock RCC_AHB1Periph_GPIOG: GPIOG clock RCC_AHB1Periph_GPIOG: GPIOG clock RCC_AHB1Periph_GPIOI: GPIOI clock RCC_AHB1Periph_GPIOJ: GPIOJ clock (STM32F42xxx/43xxx devices) RCC_AHB1Periph_GPIOK: GPIOK clock (STM32F42xxx/43xxxdevices) RCC_AHB1Periph_CRC: CRC clock RCC_AHB1Periph_DMA1: DMA1 clock RCC_AHB1Periph_DMA2: DMA2 clock RCC_AHB1Periph_DMA2D: DMA2D clock (STM32F429xx/439xx devices) RCC_AHB1Periph_ETH_MAC: Ethernet MAC clock RCC_AHB1Periph_OTG_HS: USB OTG HS clock

NewState

new state of the specified peripheral reset. This parameter can be: ENABLE or DISABLE.

Return values

None

Definition at line 1659 of file stm32f4xx_rcc.c.

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void RCC_AHB2PeriphClockCmd	(	uint32_t	RCC_AHB2Periph,
		FunctionalState	NewState
	)

Enables or disables the AHB2 peripheral clock.

Note

After reset, the peripheral clock (used for registers read/write access) is disabled and the application software has to enable this clock before using it.

Parameters

RCC_AHBPeriph	specifies the AHB2 peripheral to gates its clock. This parameter can be any combination of the following values: RCC_AHB2Periph_DCMI: DCMI clock RCC_AHB2Periph_CRYP: CRYP clock RCC_AHB2Periph_HASH: HASH clock RCC_AHB2Periph_RNG: RNG clock RCC_AHB2Periph_OTG_FS: USB OTG FS clock
NewState	new state of the specified peripheral clock. This parameter can be: ENABLE or DISABLE.

Return values

None

Definition at line 1492 of file stm32f4xx_rcc.c.

void RCC_AHB2PeriphClockLPModeCmd	(	uint32_t	RCC_AHB2Periph,
		FunctionalState	NewState
	)

Enables or disables the AHB2 peripheral clock during Low Power (Sleep) mode.

Note

Peripheral clock gating in SLEEP mode can be used to further reduce power consumption.

After wakeup from SLEEP mode, the peripheral clock is enabled again.

By default, all peripheral clocks are enabled during SLEEP mode.

Parameters

RCC_AHBPeriph	specifies the AHB2 peripheral to gates its clock. This parameter can be any combination of the following values: RCC_AHB2Periph_DCMI: DCMI clock RCC_AHB2Periph_CRYP: CRYP clock RCC_AHB2Periph_HASH: HASH clock RCC_AHB2Periph_RNG: RNG clock RCC_AHB2Periph_OTG_FS: USB OTG FS clock
NewState	new state of the specified peripheral clock. This parameter can be: ENABLE or DISABLE.

Return values

None

Definition at line 1884 of file stm32f4xx_rcc.c.

void RCC_AHB2PeriphResetCmd	(	uint32_t	RCC_AHB2Periph,
		FunctionalState	NewState
	)

Forces or releases AHB2 peripheral reset.

Parameters

RCC_AHB2Periph	specifies the AHB2 peripheral to reset. This parameter can be any combination of the following values: RCC_AHB2Periph_DCMI: DCMI clock RCC_AHB2Periph_CRYP: CRYP clock RCC_AHB2Periph_HASH: HASH clock RCC_AHB2Periph_RNG: RNG clock RCC_AHB2Periph_OTG_FS: USB OTG FS clock
NewState	new state of the specified peripheral reset. This parameter can be: ENABLE or DISABLE.

Return values

None

Definition at line 1688 of file stm32f4xx_rcc.c.

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void RCC_AHB3PeriphClockCmd	(	uint32_t	RCC_AHB3Periph,
		FunctionalState	NewState
	)

Enables or disables the AHB3 peripheral clock.

Note

After reset, the peripheral clock (used for registers read/write access) is disabled and the application software has to enable this clock before using it.

Parameters

RCC_AHBPeriph	specifies the AHB3 peripheral to gates its clock. This parameter must be: RCC_AHB3Periph_FSMC or RCC_AHB3Periph_FMC (STM32F42xxx/43xxx devices)
NewState	new state of the specified peripheral clock. This parameter can be: ENABLE or DISABLE.

Return values

None

Definition at line 1520 of file stm32f4xx_rcc.c.

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void RCC_AHB3PeriphClockLPModeCmd	(	uint32_t	RCC_AHB3Periph,
		FunctionalState	NewState
	)

Enables or disables the AHB3 peripheral clock during Low Power (Sleep) mode.

Note

Peripheral clock gating in SLEEP mode can be used to further reduce power consumption.

After wakeup from SLEEP mode, the peripheral clock is enabled again.

By default, all peripheral clocks are enabled during SLEEP mode.

Parameters

RCC_AHBPeriph	specifies the AHB3 peripheral to gates its clock. This parameter must be: RCC_AHB3Periph_FSMC or RCC_AHB3Periph_FMC (STM32F429x/439x devices)
NewState	new state of the specified peripheral clock. This parameter can be: ENABLE or DISABLE.

Return values

None

Definition at line 1912 of file stm32f4xx_rcc.c.

void RCC_AHB3PeriphResetCmd	(	uint32_t	RCC_AHB3Periph,
		FunctionalState	NewState
	)

Forces or releases AHB3 peripheral reset.

Parameters

RCC_AHB3Periph	specifies the AHB3 peripheral to reset. This parameter must be: RCC_AHB3Periph_FSMC or RCC_AHB3Periph_FMC (STM32F42xxx/43xxx devices)
NewState	new state of the specified peripheral reset. This parameter can be: ENABLE or DISABLE.

Return values

None

Definition at line 1713 of file stm32f4xx_rcc.c.

void RCC_APB1PeriphClockCmd	(	uint32_t	RCC_APB1Periph,
		FunctionalState	NewState
	)

Enables or disables the Low Speed APB (APB1) peripheral clock.

Note

After reset, the peripheral clock (used for registers read/write access) is disabled and the application software has to enable this clock before using it.

Parameters

RCC_APB1Periph

specifies the APB1 peripheral to gates its clock. This parameter can be any combination of the following values: RCC_APB1Periph_TIM2: TIM2 clock RCC_APB1Periph_TIM3: TIM3 clock RCC_APB1Periph_TIM4: TIM4 clock RCC_APB1Periph_TIM5: TIM5 clock RCC_APB1Periph_TIM6: TIM6 clock RCC_APB1Periph_TIM7: TIM7 clock RCC_APB1Periph_TIM12: TIM12 clock RCC_APB1Periph_TIM13: TIM13 clock RCC_APB1Periph_TIM14: TIM14 clock RCC_APB1Periph_WWDG: WWDG clock RCC_APB1Periph_SPI2: SPI2 clock RCC_APB1Periph_SPI3: SPI3 clock RCC_APB1Periph_USART2: USART2 clock RCC_APB1Periph_USART3: USART3 clock RCC_APB1Periph_UART4: UART4 clock RCC_APB1Periph_UART5: UART5 clock RCC_APB1Periph_I2C1: I2C1 clock RCC_APB1Periph_I2C2: I2C2 clock RCC_APB1Periph_I2C3: I2C3 clock RCC_APB1Periph_CAN1: CAN1 clock RCC_APB1Periph_CAN2: CAN2 clock RCC_APB1Periph_PWR: PWR clock RCC_APB1Periph_DAC: DAC clock RCC_APB1Periph_UART7: UART7 clock RCC_APB1Periph_UART8: UART8 clock

NewState

new state of the specified peripheral clock. This parameter can be: ENABLE or DISABLE.

Return values

None

Definition at line 1572 of file stm32f4xx_rcc.c.

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void RCC_APB1PeriphClockLPModeCmd	(	uint32_t	RCC_APB1Periph,
		FunctionalState	NewState
	)

Enables or disables the APB1 peripheral clock during Low Power (Sleep) mode.

Note

Peripheral clock gating in SLEEP mode can be used to further reduce power consumption.

After wakeup from SLEEP mode, the peripheral clock is enabled again.

By default, all peripheral clocks are enabled during SLEEP mode.

Parameters

RCC_APB1Periph

specifies the APB1 peripheral to gates its clock. This parameter can be any combination of the following values: RCC_APB1Periph_TIM2: TIM2 clock RCC_APB1Periph_TIM3: TIM3 clock RCC_APB1Periph_TIM4: TIM4 clock RCC_APB1Periph_TIM5: TIM5 clock RCC_APB1Periph_TIM6: TIM6 clock RCC_APB1Periph_TIM7: TIM7 clock RCC_APB1Periph_TIM12: TIM12 clock RCC_APB1Periph_TIM13: TIM13 clock RCC_APB1Periph_TIM14: TIM14 clock RCC_APB1Periph_WWDG: WWDG clock RCC_APB1Periph_SPI2: SPI2 clock RCC_APB1Periph_SPI3: SPI3 clock RCC_APB1Periph_USART2: USART2 clock RCC_APB1Periph_USART3: USART3 clock RCC_APB1Periph_UART4: UART4 clock RCC_APB1Periph_UART5: UART5 clock RCC_APB1Periph_I2C1: I2C1 clock RCC_APB1Periph_I2C2: I2C2 clock RCC_APB1Periph_I2C3: I2C3 clock RCC_APB1Periph_CAN1: CAN1 clock RCC_APB1Periph_CAN2: CAN2 clock RCC_APB1Periph_PWR: PWR clock RCC_APB1Periph_DAC: DAC clock RCC_APB1Periph_UART7: UART7 clock RCC_APB1Periph_UART8: UART8 clock

NewState

new state of the specified peripheral clock. This parameter can be: ENABLE or DISABLE.

Return values

None

Definition at line 1964 of file stm32f4xx_rcc.c.

void RCC_APB1PeriphResetCmd	(	uint32_t	RCC_APB1Periph,
		FunctionalState	NewState
	)

Forces or releases Low Speed APB (APB1) peripheral reset.

Parameters

RCC_APB1Periph

specifies the APB1 peripheral to reset. This parameter can be any combination of the following values: RCC_APB1Periph_TIM2: TIM2 clock RCC_APB1Periph_TIM3: TIM3 clock RCC_APB1Periph_TIM4: TIM4 clock RCC_APB1Periph_TIM5: TIM5 clock RCC_APB1Periph_TIM6: TIM6 clock RCC_APB1Periph_TIM7: TIM7 clock RCC_APB1Periph_TIM12: TIM12 clock RCC_APB1Periph_TIM13: TIM13 clock RCC_APB1Periph_TIM14: TIM14 clock RCC_APB1Periph_WWDG: WWDG clock RCC_APB1Periph_SPI2: SPI2 clock RCC_APB1Periph_SPI3: SPI3 clock RCC_APB1Periph_USART2: USART2 clock RCC_APB1Periph_USART3: USART3 clock RCC_APB1Periph_UART4: UART4 clock RCC_APB1Periph_UART5: UART5 clock RCC_APB1Periph_I2C1: I2C1 clock RCC_APB1Periph_I2C2: I2C2 clock RCC_APB1Periph_I2C3: I2C3 clock RCC_APB1Periph_CAN1: CAN1 clock RCC_APB1Periph_CAN2: CAN2 clock RCC_APB1Periph_PWR: PWR clock RCC_APB1Periph_DAC: DAC clock RCC_APB1Periph_UART7: UART7 clock RCC_APB1Periph_UART8: UART8 clock

NewState

new state of the specified peripheral reset. This parameter can be: ENABLE or DISABLE.

Return values

None

Definition at line 1762 of file stm32f4xx_rcc.c.

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void RCC_APB2PeriphClockCmd	(	uint32_t	RCC_APB2Periph,
		FunctionalState	NewState
	)

Enables or disables the High Speed APB (APB2) peripheral clock.

Note

After reset, the peripheral clock (used for registers read/write access) is disabled and the application software has to enable this clock before using it.

Parameters

RCC_APB2Periph

specifies the APB2 peripheral to gates its clock. This parameter can be any combination of the following values: RCC_APB2Periph_TIM1: TIM1 clock RCC_APB2Periph_TIM8: TIM8 clock RCC_APB2Periph_USART1: USART1 clock RCC_APB2Periph_USART6: USART6 clock RCC_APB2Periph_ADC1: ADC1 clock RCC_APB2Periph_ADC2: ADC2 clock RCC_APB2Periph_ADC3: ADC3 clock RCC_APB2Periph_SDIO: SDIO clock RCC_APB2Periph_SPI1: SPI1 clock RCC_APB2Periph_SPI4: SPI4 clock RCC_APB2Periph_SYSCFG: SYSCFG clock RCC_APB2Periph_TIM9: TIM9 clock RCC_APB2Periph_TIM10: TIM10 clock RCC_APB2Periph_TIM11: TIM11 clock RCC_APB2Periph_SPI5: SPI5 clock RCC_APB2Periph_SPI6: SPI6 clock RCC_APB2Periph_SAI1: SAI1 clock (STM32F42xxx/43xxx devices) RCC_APB2Periph_LTDC: LTDC clock (STM32F429xx/439xx devices)

NewState

new state of the specified peripheral clock. This parameter can be: ENABLE or DISABLE.

Return values

None

Definition at line 1617 of file stm32f4xx_rcc.c.

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void RCC_APB2PeriphClockLPModeCmd	(	uint32_t	RCC_APB2Periph,
		FunctionalState	NewState
	)

Enables or disables the APB2 peripheral clock during Low Power (Sleep) mode.

Note

Peripheral clock gating in SLEEP mode can be used to further reduce power consumption.

After wakeup from SLEEP mode, the peripheral clock is enabled again.

By default, all peripheral clocks are enabled during SLEEP mode.

Parameters

RCC_APB2Periph

specifies the APB2 peripheral to gates its clock. This parameter can be any combination of the following values: RCC_APB2Periph_TIM1: TIM1 clock RCC_APB2Periph_TIM8: TIM8 clock RCC_APB2Periph_USART1: USART1 clock RCC_APB2Periph_USART6: USART6 clock RCC_APB2Periph_ADC1: ADC1 clock RCC_APB2Periph_ADC2: ADC2 clock RCC_APB2Periph_ADC3: ADC3 clock RCC_APB2Periph_SDIO: SDIO clock RCC_APB2Periph_SPI1: SPI1 clock RCC_APB2Periph_SPI4: SPI4 clock RCC_APB2Periph_SYSCFG: SYSCFG clock RCC_APB2Periph_TIM9: TIM9 clock RCC_APB2Periph_TIM10: TIM10 clock RCC_APB2Periph_TIM11: TIM11 clock RCC_APB2Periph_SPI5: SPI5 clock RCC_APB2Periph_SPI6: SPI6 clock RCC_APB2Periph_SAI1: SAI1 clock (STM32F42xxx/43xxx devices) RCC_APB2Periph_LTDC: LTDC clock (STM32F429xx/439xx devices)

NewState

new state of the specified peripheral clock. This parameter can be: ENABLE or DISABLE.

Return values

None

Definition at line 2009 of file stm32f4xx_rcc.c.

void RCC_APB2PeriphResetCmd	(	uint32_t	RCC_APB2Periph,
		FunctionalState	NewState
	)

Forces or releases High Speed APB (APB2) peripheral reset.

Parameters

RCC_APB2Periph

specifies the APB2 peripheral to reset. This parameter can be any combination of the following values: RCC_APB2Periph_TIM1: TIM1 clock RCC_APB2Periph_TIM8: TIM8 clock RCC_APB2Periph_USART1: USART1 clock RCC_APB2Periph_USART6: USART6 clock RCC_APB2Periph_ADC1: ADC1 clock RCC_APB2Periph_ADC2: ADC2 clock RCC_APB2Periph_ADC3: ADC3 clock RCC_APB2Periph_SDIO: SDIO clock RCC_APB2Periph_SPI1: SPI1 clock RCC_APB2Periph_SPI4: SPI4 clock RCC_APB2Periph_SYSCFG: SYSCFG clock RCC_APB2Periph_TIM9: TIM9 clock RCC_APB2Periph_TIM10: TIM10 clock RCC_APB2Periph_TIM11: TIM11 clock RCC_APB2Periph_SPI5: SPI5 clock RCC_APB2Periph_SPI6: SPI6 clock RCC_APB2Periph_SAI1: SAI1 clock (STM32F42xxx/43xxx devices) RCC_APB2Periph_LTDC: LTDC clock (STM32F429xx/439xx devices)

NewState

new state of the specified peripheral reset. This parameter can be: ENABLE or DISABLE.

Return values

None

Definition at line 1803 of file stm32f4xx_rcc.c.

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void RCC_BackupResetCmd

(

FunctionalState

NewState

)

Forces or releases the Backup domain reset.

Note

This function resets the RTC peripheral (including the backup registers) and the RTC clock source selection in RCC_CSR register.

The BKPSRAM is not affected by this reset.

Parameters

NewState

new state of the Backup domain reset. This parameter can be: ENABLE or DISABLE.

Return values

None

Definition at line 1205 of file stm32f4xx_rcc.c.

void RCC_I2SCLKConfig

(

uint32_t

RCC_I2SCLKSource

)

Configures the I2S clock source (I2SCLK).

Note

This function must be called before enabling the I2S APB clock.

Parameters

RCC_I2SCLKSource

specifies the I2S clock source. This parameter can be one of the following values: RCC_I2S2CLKSource_PLLI2S: PLLI2S clock used as I2S clock source RCC_I2S2CLKSource_Ext: External clock mapped on the I2S_CKIN pin used as I2S clock source

Return values

None

Definition at line 1222 of file stm32f4xx_rcc.c.

void RCC_LTDCCLKDivConfig

(

uint32_t

RCC_PLLSAIDivR

)

Configures the LTDC clock Divider coming from PLLSAI.

Note

The LTDC peripheral is only available with STM32F429xx/439xx Devices.

This function must be called before enabling the PLLSAI.

Parameters

RCC_PLLSAIDivR

specifies the PLLSAI division factor for LTDC clock . This parameter must be a number between 2 and 16. LTDC clock frequency = f(PLLSAI_R) / RCC_PLLSAIDivR

Return values

None

Definition at line 1380 of file stm32f4xx_rcc.c.

void RCC_RTCCLKCmd

(

FunctionalState

NewState

)

Enables or disables the RTC clock.

Note

This function must be used only after the RTC clock source was selected using the RCC_RTCCLKConfig function.

Parameters

NewState

new state of the RTC clock. This parameter can be: ENABLE or DISABLE.

Return values

None

Definition at line 1188 of file stm32f4xx_rcc.c.

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void RCC_RTCCLKConfig

(

uint32_t

RCC_RTCCLKSource

)

Configures the RTC clock (RTCCLK).

Note

As the RTC clock configuration bits are in the Backup domain and write access is denied to this domain after reset, you have to enable write access using PWR_BackupAccessCmd(ENABLE) function before to configure the RTC clock source (to be done once after reset).

Once the RTC clock is configured it can't be changed unless the Backup domain is reset using RCC_BackupResetCmd() function, or by a Power On Reset (POR).

Parameters

RCC_RTCCLKSource

specifies the RTC clock source. This parameter can be one of the following values: RCC_RTCCLKSource_LSE: LSE selected as RTC clock RCC_RTCCLKSource_LSI: LSI selected as RTC clock RCC_RTCCLKSource_HSE_Divx: HSE clock divided by x selected as RTC clock, where x:[2,31]

Note

If the LSE or LSI is used as RTC clock source, the RTC continues to work in STOP and STANDBY modes, and can be used as wakeup source. However, when the HSE clock is used as RTC clock source, the RTC cannot be used in STOP and STANDBY modes.

The maximum input clock frequency for RTC is 1MHz (when using HSE as RTC clock source).

Return values

None

Definition at line 1156 of file stm32f4xx_rcc.c.

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void RCC_SAIBlockACLKConfig

(

uint32_t

RCC_SAIBlockACLKSource

)

Configures SAI1BlockA clock source selection.

Note

This function can be used only for STM32F42xxx/43xxx devices.

This function must be called before enabling PLLSAI, PLLI2S and the SAI clock.

Parameters

RCC_SAIBlockACLKSource

specifies the SAI Block A clock source. This parameter can be one of the following values: RCC_SAIACLKSource_PLLI2S: PLLI2S_Q clock divided by PLLI2SDIVQ used as SAI1 Block A clock RCC_SAIACLKSource_PLLSAI: PLLISAI_Q clock divided by PLLSAIDIVQ used as SAI1 Block A clock RCC_SAIACLKSource_Ext: External clock mapped on the I2S_CKIN pin used as SAI1 Block A clock

Return values

None

Definition at line 1311 of file stm32f4xx_rcc.c.

void RCC_SAIBlockBCLKConfig

(

uint32_t

RCC_SAIBlockBCLKSource

)

Configures SAI1BlockB clock source selection.

Note

This function can be used only for STM32F42xxx/43xxx devices.

This function must be called before enabling PLLSAI, PLLI2S and the SAI clock.

Parameters

RCC_SAIBlockBCLKSource

specifies the SAI Block B clock source. This parameter can be one of the following values: RCC_SAIBCLKSource_PLLI2S: PLLI2S_Q clock divided by PLLI2SDIVQ used as SAI1 Block B clock RCC_SAIBCLKSource_PLLSAI: PLLISAI_Q clock divided by PLLSAIDIVQ used as SAI1 Block B clock RCC_SAIBCLKSource_Ext: External clock mapped on the I2S_CKIN pin used as SAI1 Block B clock

Return values

None

Definition at line 1347 of file stm32f4xx_rcc.c.

void RCC_SAIPLLI2SClkDivConfig

(

uint32_t

RCC_PLLI2SDivQ

)

Configures the SAI clock Divider coming from PLLI2S.

Note

This function can be used only for STM32F42xxx/43xxx devices.

This function must be called before enabling the PLLI2S.

Parameters

RCC_PLLI2SDivQ

specifies the PLLI2S division factor for SAI1 clock . This parameter must be a number between 1 and 32. SAI1 clock frequency = f(PLLI2S_Q) / RCC_PLLI2SDivQ

Return values

None

Definition at line 1243 of file stm32f4xx_rcc.c.

void RCC_SAIPLLSAIClkDivConfig

(

uint32_t

RCC_PLLSAIDivQ

)

Configures the SAI clock Divider coming from PLLSAI.

Note

This function can be used only for STM32F42xxx/43xxx devices.

This function must be called before enabling the PLLSAI.

Parameters

RCC_PLLSAIDivQ

specifies the PLLSAI division factor for SAI1 clock . This parameter must be a number between 1 and 32. SAI1 clock frequency = f(PLLSAI_Q) / RCC_PLLSAIDivQ

Return values

None

Definition at line 1275 of file stm32f4xx_rcc.c.

void RCC_TIMCLKPresConfig

(

uint32_t

RCC_TIMCLKPrescaler

)

Configures the Timers clocks prescalers selection.

Note

This function can be used only for STM32F42xxx/43xxx and STM32F401xx devices.

Parameters

RCC_TIMCLKPrescaler

: specifies the Timers clocks prescalers selection This parameter can be one of the following values: RCC_TIMPrescDesactivated: The Timers kernels clocks prescaler is equal to HPRE if PPREx is corresponding to division by 1 or 2, else it is equal to [(HPRE * PPREx) / 2] if PPREx is corresponding to division by 4 or more. RCC_TIMPrescActivated: The Timers kernels clocks prescaler is equal to HPRE if PPREx is corresponding to division by 1, 2 or 4, else it is equal to [(HPRE * PPREx) / 4] if PPREx is corresponding to division by 8 or more.

Return values

None

Definition at line 1417 of file stm32f4xx_rcc.c.