CARME-M4 BSP  V1.5
stm32f4_sdio_sd_lld.c
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1 
16 #ifdef __cplusplus
17 extern "C" {
18 #endif /* __cplusplus */
19 
20 #include "stm32f4xx.h"
21 #include "stm32f4_sdio_sd.h"
22 
28 void SD_LowLevel_DeInit(void) {
29  GPIO_InitTypeDef GPIO_InitStructure;
30 
31  /* Disable SDIO Clock */
32  SDIO_ClockCmd(DISABLE);
33 
34  /* Set Power State to OFF */
35  SDIO_SetPowerState(SDIO_PowerState_OFF );
36 
37  /* DeInitializes the SDIO peripheral */
38  SDIO_DeInit();
39 
40  /* Disable the SDIO APB2 Clock */
41  RCC_APB2PeriphClockCmd(RCC_APB2Periph_SDIO, DISABLE);
42 
43  GPIO_PinAFConfig(GPIOC, GPIO_PinSource8, GPIO_AF_MCO );
44  GPIO_PinAFConfig(GPIOC, GPIO_PinSource9, GPIO_AF_MCO );
45  GPIO_PinAFConfig(GPIOC, GPIO_PinSource10, GPIO_AF_MCO );
46  GPIO_PinAFConfig(GPIOC, GPIO_PinSource11, GPIO_AF_MCO );
47  GPIO_PinAFConfig(GPIOC, GPIO_PinSource12, GPIO_AF_MCO );
48  GPIO_PinAFConfig(GPIOD, GPIO_PinSource2, GPIO_AF_MCO );
49 
50  /* Configure PC.08, PC.09, PC.10, PC.11 pins: D0, D1, D2, D3 pins */
51  GPIO_InitStructure.GPIO_Pin = GPIO_Pin_8 | GPIO_Pin_9 | GPIO_Pin_10
52  | GPIO_Pin_11;
53  GPIO_InitStructure.GPIO_Mode = GPIO_Mode_IN;
54  GPIO_InitStructure.GPIO_PuPd = GPIO_PuPd_NOPULL;
55  GPIO_Init(GPIOC, &GPIO_InitStructure);
56 
57  /* Configure PD.02 CMD line */
58  GPIO_InitStructure.GPIO_Pin = GPIO_Pin_2;
59  GPIO_Init(GPIOD, &GPIO_InitStructure);
60 
61  /* Configure PC.12 pin: CLK pin */
62  GPIO_InitStructure.GPIO_Pin = GPIO_Pin_12;
63  GPIO_Init(GPIOC, &GPIO_InitStructure);
64 }
65 
70 void SD_LowLevel_Init(void) {
71  GPIO_InitTypeDef GPIO_InitStructure;
72  NVIC_InitTypeDef NVIC_InitStructure;
73 
74  /* Configure the NVIC Preemption Priority Bits */
76 
77  NVIC_InitStructure.NVIC_IRQChannel = SDIO_IRQn;
78  NVIC_InitStructure.NVIC_IRQChannelPreemptionPriority = 0;
79  NVIC_InitStructure.NVIC_IRQChannelSubPriority = 0;
80  NVIC_InitStructure.NVIC_IRQChannelCmd = ENABLE;
81  NVIC_Init(&NVIC_InitStructure);
82 
83  /* GPIOC and GPIOD Periph clock enable */
84  RCC_AHB1PeriphClockCmd(RCC_AHB1Periph_GPIOC | RCC_AHB1Periph_GPIOD, ENABLE);
85 #if SD_DETECT_USE
86  RCC_AHB1PeriphClockCmd(SD_DETECT_GPIO_CLK, ENABLE);
87 #endif
88 
89  GPIO_PinAFConfig(GPIOC, GPIO_PinSource8, GPIO_AF_SDIO );
90  GPIO_PinAFConfig(GPIOC, GPIO_PinSource9, GPIO_AF_SDIO );
91  GPIO_PinAFConfig(GPIOC, GPIO_PinSource10, GPIO_AF_SDIO );
92  GPIO_PinAFConfig(GPIOC, GPIO_PinSource11, GPIO_AF_SDIO );
93  GPIO_PinAFConfig(GPIOC, GPIO_PinSource12, GPIO_AF_SDIO );
94  GPIO_PinAFConfig(GPIOD, GPIO_PinSource2, GPIO_AF_SDIO );
95 
96  /* Configure PC.08, PC.09, PC.10, PC.11 pins: D0, D1, D2, D3 pins */
97  GPIO_InitStructure.GPIO_Pin = GPIO_Pin_8 | GPIO_Pin_9 | GPIO_Pin_10
98  | GPIO_Pin_11;
99  GPIO_InitStructure.GPIO_Speed = GPIO_Medium_Speed;
100  GPIO_InitStructure.GPIO_Mode = GPIO_Mode_AF;
101  GPIO_InitStructure.GPIO_OType = GPIO_OType_PP;
102  GPIO_InitStructure.GPIO_PuPd = GPIO_PuPd_UP;
103  GPIO_Init(GPIOC, &GPIO_InitStructure);
104 
105  /* Configure PD.02 CMD line */
106  GPIO_InitStructure.GPIO_Pin = GPIO_Pin_2;
107  GPIO_Init(GPIOD, &GPIO_InitStructure);
108 
109  /* Configure PC.12 pin: CLK pin */
110  GPIO_InitStructure.GPIO_Pin = GPIO_Pin_12;
111  GPIO_InitStructure.GPIO_PuPd = GPIO_PuPd_NOPULL;
112  GPIO_Init(GPIOC, &GPIO_InitStructure);
113 
114  /* Configure SD_SPI_DETECT_PIN pin: SD Card detect pin */
115 #if SD_DETECT_USE
116  GPIO_InitStructure.GPIO_Pin = SD_DETECT_PIN;
117  GPIO_InitStructure.GPIO_Mode = GPIO_Mode_IN;
118  GPIO_InitStructure.GPIO_PuPd = GPIO_PuPd_UP;
119  GPIO_Init(SD_DETECT_GPIO_PORT, &GPIO_InitStructure);
120 #endif
121 
122  /* Enable the SDIO APB2 Clock */
123  RCC_APB2PeriphClockCmd(RCC_APB2Periph_SDIO, ENABLE);
124 
125  /* Enable the DMA2 Clock */
126  RCC_AHB1PeriphClockCmd(SD_SDIO_DMA_CLK, ENABLE);
127 }
128 
136 void SD_LowLevel_DMA_TxConfig(uint32_t *BufferSRC, uint32_t BufferSize) {
137  DMA_InitTypeDef SDDMA_InitStructure;
138 
140  SD_SDIO_DMA_STREAM,
141  SD_SDIO_DMA_FLAG_FEIF | SD_SDIO_DMA_FLAG_DMEIF
142  | SD_SDIO_DMA_FLAG_TEIF | SD_SDIO_DMA_FLAG_HTIF
143  | SD_SDIO_DMA_FLAG_TCIF );
144 
145  /* DMA2 Stream3 or Stream6 disable */
146  DMA_Cmd(SD_SDIO_DMA_STREAM, DISABLE);
147 
148  /* DMA2 Stream3 or Stream6 Config */
149  DMA_DeInit(SD_SDIO_DMA_STREAM );
150 
151  SDDMA_InitStructure.DMA_Channel = SD_SDIO_DMA_CHANNEL;
152  SDDMA_InitStructure.DMA_PeripheralBaseAddr = (uint32_t) SDIO_FIFO_ADDRESS;
153  SDDMA_InitStructure.DMA_Memory0BaseAddr = (uint32_t) BufferSRC;
154  SDDMA_InitStructure.DMA_DIR = DMA_DIR_MemoryToPeripheral;
155  SDDMA_InitStructure.DMA_BufferSize = 0;
156  SDDMA_InitStructure.DMA_PeripheralInc = DMA_PeripheralInc_Disable;
157  SDDMA_InitStructure.DMA_MemoryInc = DMA_MemoryInc_Enable;
158  SDDMA_InitStructure.DMA_PeripheralDataSize = DMA_PeripheralDataSize_Word;
159  SDDMA_InitStructure.DMA_MemoryDataSize = DMA_MemoryDataSize_Word;
160  SDDMA_InitStructure.DMA_Mode = DMA_Mode_Normal;
161  SDDMA_InitStructure.DMA_Priority = DMA_Priority_VeryHigh;
162  SDDMA_InitStructure.DMA_FIFOMode = DMA_FIFOMode_Enable;
163  SDDMA_InitStructure.DMA_FIFOThreshold = DMA_FIFOThreshold_Full;
164  SDDMA_InitStructure.DMA_MemoryBurst = DMA_MemoryBurst_INC4;
165  SDDMA_InitStructure.DMA_PeripheralBurst = DMA_PeripheralBurst_INC4;
166  DMA_Init(SD_SDIO_DMA_STREAM, &SDDMA_InitStructure);
167  DMA_ITConfig(SD_SDIO_DMA_STREAM, DMA_IT_TC, ENABLE);
168  DMA_FlowControllerConfig(SD_SDIO_DMA_STREAM, DMA_FlowCtrl_Peripheral );
169 
170  /* DMA2 Stream3 or Stream6 enable */
171  DMA_Cmd(SD_SDIO_DMA_STREAM, ENABLE);
172 
173 }
174 
182 void SD_LowLevel_DMA_RxConfig(uint32_t *BufferDST, uint32_t BufferSize) {
183  DMA_InitTypeDef SDDMA_InitStructure;
184 
186  SD_SDIO_DMA_STREAM,
187  SD_SDIO_DMA_FLAG_FEIF | SD_SDIO_DMA_FLAG_DMEIF
188  | SD_SDIO_DMA_FLAG_TEIF | SD_SDIO_DMA_FLAG_HTIF
189  | SD_SDIO_DMA_FLAG_TCIF );
190 
191  /* DMA2 Stream3 or Stream6 disable */
192  DMA_Cmd(SD_SDIO_DMA_STREAM, DISABLE);
193 
194  /* DMA2 Stream3 or Stream6 Config */
195  DMA_DeInit(SD_SDIO_DMA_STREAM );
196 
197  SDDMA_InitStructure.DMA_Channel = SD_SDIO_DMA_CHANNEL;
198  SDDMA_InitStructure.DMA_PeripheralBaseAddr = (uint32_t) SDIO_FIFO_ADDRESS;
199  SDDMA_InitStructure.DMA_Memory0BaseAddr = (uint32_t) BufferDST;
200  SDDMA_InitStructure.DMA_DIR = DMA_DIR_PeripheralToMemory;
201  SDDMA_InitStructure.DMA_BufferSize = 0;
202  SDDMA_InitStructure.DMA_PeripheralInc = DMA_PeripheralInc_Disable;
203  SDDMA_InitStructure.DMA_MemoryInc = DMA_MemoryInc_Enable;
204  SDDMA_InitStructure.DMA_PeripheralDataSize = DMA_PeripheralDataSize_Word;
205  SDDMA_InitStructure.DMA_MemoryDataSize = DMA_MemoryDataSize_Word;
206  SDDMA_InitStructure.DMA_Mode = DMA_Mode_Normal;
207  SDDMA_InitStructure.DMA_Priority = DMA_Priority_VeryHigh;
208  SDDMA_InitStructure.DMA_FIFOMode = DMA_FIFOMode_Enable;
209  SDDMA_InitStructure.DMA_FIFOThreshold = DMA_FIFOThreshold_Full;
210  SDDMA_InitStructure.DMA_MemoryBurst = DMA_MemoryBurst_INC4;
211  SDDMA_InitStructure.DMA_PeripheralBurst = DMA_PeripheralBurst_INC4;
212  DMA_Init(SD_SDIO_DMA_STREAM, &SDDMA_InitStructure);
213  DMA_ITConfig(SD_SDIO_DMA_STREAM, DMA_IT_TC, ENABLE);
214  DMA_FlowControllerConfig(SD_SDIO_DMA_STREAM, DMA_FlowCtrl_Peripheral );
215 
216  /* DMA2 Stream3 or Stream6 enable */
217  DMA_Cmd(SD_SDIO_DMA_STREAM, ENABLE);
218 }
219 
223 void SDIO_IRQHandler(void) {
225 }
226 
232 }
233 
#define SD_DETECT_GPIO_PORT
void DMA_FlowControllerConfig(DMA_Stream_TypeDef *DMAy_Streamx, uint32_t DMA_FlowCtrl)
Configures, when the DMAy Streamx is disabled, the flow controller for the next transactions (Periphe...
uint32_t DMA_FIFOMode
Definition: stm32f4xx_dma.h:93
void NVIC_Init(NVIC_InitTypeDef *NVIC_InitStruct)
Initializes the NVIC peripheral according to the specified parameters in the NVIC_InitStruct.
Definition: misc.c:136
uint32_t DMA_PeripheralBurst
uint32_t DMA_PeripheralDataSize
Definition: stm32f4xx_dma.h:79
GPIOOType_TypeDef GPIO_OType
uint8_t NVIC_IRQChannelPreemptionPriority
Definition: misc.h:61
void DMA_DeInit(DMA_Stream_TypeDef *DMAy_Streamx)
Deinitialize the DMAy Streamx registers to their default reset values.
void RCC_APB2PeriphClockCmd(uint32_t RCC_APB2Periph, FunctionalState NewState)
Enables or disables the High Speed APB (APB2) peripheral clock.
void DMA_ClearFlag(DMA_Stream_TypeDef *DMAy_Streamx, uint32_t DMA_FLAG)
Clears the DMAy Streamx's pending flags.
void DMA_ITConfig(DMA_Stream_TypeDef *DMAy_Streamx, uint32_t DMA_IT, FunctionalState NewState)
Enables or disables the specified DMAy Streamx interrupts.
uint32_t DMA_Mode
Definition: stm32f4xx_dma.h:85
uint32_t DMA_PeripheralBaseAddr
Definition: stm32f4xx_dma.h:59
void SD_LowLevel_DeInit(void)
DeInitializes the SDIO interface. Disable SDIO Clock, Set Power State to OFF, DeInitializes the SDIO...
uint32_t DMA_MemoryBurst
void GPIO_PinAFConfig(GPIO_TypeDef *GPIOx, uint16_t GPIO_PinSource, uint8_t GPIO_AF)
Changes the mapping of the specified pin.
This file contains all the functions prototypes for the SD Card stm324xg_eval_sdio_sd driver firmware...
void SDIO_IRQHandler(void)
SDIO IRQ Handler.
GPIOSpeed_TypeDef GPIO_Speed
uint32_t DMA_Channel
Definition: stm32f4xx_dma.h:56
void SD_LowLevel_Init(void)
Initializes the SD Card and put it into StandBy State (Ready for data transfer).
GPIOPuPd_TypeDef GPIO_PuPd
NVIC Init Structure definition.
Definition: misc.h:54
uint32_t DMA_MemoryDataSize
Definition: stm32f4xx_dma.h:82
DMA Init structure definition.
Definition: stm32f4xx_dma.h:54
uint32_t DMA_BufferSize
Definition: stm32f4xx_dma.h:69
uint8_t NVIC_IRQChannel
Definition: misc.h:56
uint32_t DMA_MemoryInc
Definition: stm32f4xx_dma.h:76
FunctionalState NVIC_IRQChannelCmd
Definition: misc.h:71
void SD_LowLevel_DMA_RxConfig(uint32_t *BufferDST, uint32_t BufferSize)
Configures the DMA2 Channel4 for SDIO Rx request.
void GPIO_Init(GPIO_TypeDef *GPIOx, GPIO_InitTypeDef *GPIO_InitStruct)
Initializes the GPIOx peripheral according to the specified parameters in the GPIO_InitStruct.
uint32_t DMA_PeripheralInc
Definition: stm32f4xx_dma.h:73
void SD_SDIO_DMA_IRQHANDLER(void)
SDIO DMA IRQ Handler.
uint8_t NVIC_IRQChannelSubPriority
Definition: misc.h:66
void RCC_AHB1PeriphClockCmd(uint32_t RCC_AHB1Periph, FunctionalState NewState)
Enables or disables the AHB1 peripheral clock.
void DMA_Cmd(DMA_Stream_TypeDef *DMAy_Streamx, FunctionalState NewState)
Enables or disables the specified DMAy Streamx.
uint32_t DMA_Priority
Definition: stm32f4xx_dma.h:90
GPIOMode_TypeDef GPIO_Mode
void SDIO_DeInit(void)
Deinitializes the SDIO peripheral registers to their default reset values.
GPIO Init structure definition.
void SD_LowLevel_DMA_TxConfig(uint32_t *BufferSRC, uint32_t BufferSize)
Configures the DMA2 Channel4 for SDIO Tx request.
void NVIC_PriorityGroupConfig(uint32_t NVIC_PriorityGroup)
Configures the priority grouping: pre-emption priority and subpriority.
Definition: misc.c:118
#define SD_DETECT_PIN
void SDIO_SetPowerState(uint32_t SDIO_PowerState)
Sets the power status of the controller.
void DMA_Init(DMA_Stream_TypeDef *DMAy_Streamx, DMA_InitTypeDef *DMA_InitStruct)
Initializes the DMAy Streamx according to the specified parameters in the DMA_InitStruct structure...
uint32_t DMA_FIFOThreshold
Definition: stm32f4xx_dma.h:98
#define NVIC_PriorityGroup_4
Definition: misc.h:124
SD_Error SD_ProcessIRQSrc(void)
Allows to process all the interrupts that are high.
uint32_t DMA_DIR
Definition: stm32f4xx_dma.h:65
void SDIO_ClockCmd(FunctionalState NewState)
Enables or disables the SDIO Clock.
void SD_ProcessDMAIRQ(void)
This function waits until the SDIO DMA data transfer is finished.
uint32_t DMA_Memory0BaseAddr
Definition: stm32f4xx_dma.h:61