CARME-M4 BSP  V1.5
ssd1963.c
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1 
71 #ifdef __cplusplus
72 extern "C" {
73 #endif /* __cplusplus */
74 
75 /*----- Header-Files -------------------------------------------------------*/
76 #include <stdint.h> /* Standard integer formats */
77 #include "ssd1963.h" /* SSD1963 Graphic-Controller */
78 #include "ssd1963_lld.h" /* SSD1963 Graphic-Controller driver */
79 #include "ssd1963_cmd.h" /* SSD1963 Graphic-Controller commands */
80 #include "lcd_conf.h" /* LCD configuration */
81 
82 /*----- Macros -------------------------------------------------------------*/
83 
84 /*----- Data types ---------------------------------------------------------*/
85 
86 /*----- Function prototypes ------------------------------------------------*/
87 
88 /*----- Data ---------------------------------------------------------------*/
89 static uint16_t deviceDescriptorBlock[3];
90 
91 /*----- Implementation -----------------------------------------------------*/
100 static void SSD1963_Delay(uint32_t nCount) {
101 
102  volatile uint32_t index = 0;
103 
104  for (index = (100000 * nCount); index != 0; index--)
105  ;
106 }
107 
115 void SSD1963_Init(void) {
116 
118 
119  SSD1963_GetDeviceDescriptorBlock(deviceDescriptorBlock);
120 
121  /* Software reset */
123  SSD1963_Delay(10);
124 
133  SSD1963_WriteCommand(CMD_SET_PLL_MN); /* Set PLL with OSC = 8 MHz */
134  SSD1963_WriteData(0x002C); /* Multiplier N = 44,
135  * VCO (>250MHz) = OSC*(N+1), VCO = 360MHz */
136  SSD1963_WriteData(0x0002); /* Divider M = 3, PLL = 360/(M+1) = 120MHz */
137  SSD1963_WriteData(0xA5); /* Validate M and N values */
138 
139  SSD1963_WriteCommand(CMD_PLL_START); /* Start PLL command */
140  SSD1963_WriteData(0x01); /* Enable PLL */
141  SSD1963_Delay(10); /* Wait to stabilize */
142 
143  SSD1963_WriteCommand(CMD_PLL_START); /* Start PLL command again */
144  SSD1963_WriteData(0x03); /* Now, use PLL output as
145  * system clock */
146  SSD1963_Delay(10);
147 
148  /* Set panel mode, varies from individual manufacturer */
149  SSD1963_WriteCommand(CMD_SET_PANEL_MODE);
150  SSD1963_WriteData(0x0C); /* 18-bit 3.5" TFT Panel */
151  SSD1963_WriteData(0x00);
152  SSD1963_WriteData(WR_HIGH_BYTE((TFT_WIDTH-1))); /* Set horizontal */
153  SSD1963_WriteData(WR_LOW_BYTE((TFT_WIDTH-1))); /* panel size */
154  SSD1963_WriteData(WR_HIGH_BYTE((TFT_HEIGHT-1))); /* Set vertical */
155  SSD1963_WriteData(WR_LOW_BYTE((TFT_HEIGHT-1))); /* panel size */
156  SSD1963_WriteData(0); /* RGB sequence */
157 
158  /* Pixel data interface (host) */
159  SSD1963_WriteCommand(CMD_SET_DATA_INTERFACE);
160  SSD1963_WriteData(SSD1963_PDI_16BIT565);
161 
168  SSD1963_WriteData((LCD_FPR >> 16) & 0xFF);
169  SSD1963_WriteData((LCD_FPR >> 8) & 0xFF);
170  SSD1963_WriteData(LCD_FPR & 0xFF);
171 
172  /* Set horizontal period */
173  SSD1963_WriteCommand(CMD_SET_HOR_PERIOD);
174  SSD1963_WriteData(WR_HIGH_BYTE(TFT_HSYNC_PERIOD));
175  SSD1963_WriteData(WR_LOW_BYTE(TFT_HSYNC_PERIOD));
176  SSD1963_WriteData(WR_HIGH_BYTE((TFT_HSYNC_PULSE + TFT_HSYNC_BACK_PORCH)));
177  SSD1963_WriteData(WR_LOW_BYTE((TFT_HSYNC_PULSE + TFT_HSYNC_BACK_PORCH)));
178  SSD1963_WriteData(TFT_HSYNC_PULSE);
179  SSD1963_WriteData(0x00);
180  SSD1963_WriteData(0x00);
181  SSD1963_WriteData(0x00);
182 
183  /* Set vertical period */
184  SSD1963_WriteCommand(CMD_SET_VER_PERIOD);
185  SSD1963_WriteData(WR_HIGH_BYTE(TFT_VSYNC_PERIOD));
186  SSD1963_WriteData(WR_LOW_BYTE(TFT_VSYNC_PERIOD));
187  SSD1963_WriteData(WR_HIGH_BYTE((TFT_VSYNC_PULSE + TFT_VSYNC_BACK_PORCH)));
188  SSD1963_WriteData(WR_LOW_BYTE((TFT_VSYNC_PULSE + TFT_VSYNC_BACK_PORCH)));
189  SSD1963_WriteData(TFT_VSYNC_PULSE);
190  SSD1963_WriteData(0x00);
191  SSD1963_WriteData(0x00);
192 
193  /* Setup GPIOs */
194  SSD1963_WriteCommand(CMD_SET_GPIO_CONF); /* Set all GPIOs to
195  * output, controlled by
196  * host */
197  SSD1963_WriteData(0x0F); /* Set GPIO0 as output */
198  SSD1963_WriteData(0x01); /* GPIO[3:0] used as normal GPIOs */
199 
200  /* Clear display to black */
201  SSD1963_FillArea(SCRN_LEFT, SCRN_TOP, SCRN_RIGHT, SCRN_BOTTOM, 0x00);
202  SSD1963_DisplayOn(); /* Turn on display */
203 }
204 
215 void SSD1963_WritePixel(uint16_t x, uint16_t y, uint16_t color) {
216 
217  SSD1963_SetArea(x, y, x + 1, y + 1);
218  SSD1963_WriteCommand(CMD_WR_MEMSTART);
219  SSD1963_WriteData(color);
220 }
221 
231 uint16_t SSD1963_ReadPixel(uint16_t x, uint16_t y) {
232 
233  SSD1963_SetArea(x, y, x + 1, y + 1);
234  SSD1963_WriteCommand(CMD_RD_MEMSTART);
235  return SSD1963_ReadData();
236 }
237 
250 void SSD1963_SetArea(uint16_t x1, uint16_t y1, uint16_t x2, uint16_t y2) {
251 
252  SSD1963_WriteCommand(CMD_SET_COLUMN);
253  SSD1963_WriteData((x1 >> 8) & 0x0FF);
254  SSD1963_WriteData((x1) & 0xFF);
255  SSD1963_WriteData((x2 >> 8) & 0xFF);
256  SSD1963_WriteData((x2) & 0xFF);
257  SSD1963_WriteCommand(CMD_SET_PAGE);
258  SSD1963_WriteData((y1 >> 8) & 0x0FF);
259  SSD1963_WriteData((y1) & 0x0FF);
260  SSD1963_WriteData((y2 >> 8) & 0x0FF);
261  SSD1963_WriteData((y2) & 0x0FF);
262 }
263 
276 void SSD1963_FillArea(uint16_t x1, uint16_t y1, uint16_t x2, uint16_t y2,
277  uint16_t color) {
278 
279  uint32_t i;
280 
281  SSD1963_SetArea(x1, y1, x2, y2);
282  SSD1963_WriteCommand(CMD_WR_MEMSTART);
283  for (i = 0; i < ((x2 - x1 + 1) * (y2 - y1 + 1)); i++) {
284  SSD1963_WriteData(color);
285  }
286 }
287 
301 void SSD1963_WriteArea(uint16_t x1, uint16_t y1, uint16_t x2, uint16_t y2,
302  uint16_t *pData) {
303 
304  uint32_t i;
305 
306  SSD1963_SetArea(x1, y1, x2, y2);
307  SSD1963_WriteCommand(CMD_WR_MEMSTART);
308  for (i = 0; i < ((x2 - x1 + 1) * (y2 - y1 + 1)); i++) {
309  SSD1963_WriteData(*pData++);
310  }
311 }
312 
326 void SSD1963_SetTearingCfg(uint8_t state, uint8_t mode) {
327 
328  if (state == 1) {
329  SSD1963_WriteCommand(CMD_SET_TEAR_SCANLINE);
330  SSD1963_WriteData(mode & 0x01);
331  }
332  else {
333  SSD1963_WriteCommand(0x34);
334  }
335 }
336 
346 void SSD1963_GetDeviceDescriptorBlock(uint16_t *ddb) {
347 
348  SSD1963_WriteCommand(CMD_RD_DDB_START);
349  ddb[0] = SSD1963_ReadData();
350  ddb[1] = SSD1963_ReadData();
351  ddb[2] = SSD1963_ReadData();
352 }
353 
354 #ifdef __cplusplus
355 }
356 #endif /* __cplusplus */
357 
void SSD1963_Init(void)
Init the SSD1963 LCD-Controller and clear the display.
Definition: ssd1963.c:115
uint16_t SSD1963_ReadPixel(uint16_t x, uint16_t y)
Reads pixel.
Definition: ssd1963.c:231
void SSD1963_SetTearingCfg(uint8_t state, uint8_t mode)
This function enable/disable tearing effect.
Definition: ssd1963.c:326
static uint16_t SSD1963_ReadData(void)
Read data from the display controller.
Definition: ssd1963_lld.h:130
void SSD1963_LLD_Init(void)
Initialize the communication interface to the SSD1963 LCD- Controller.
Definition: ssd1963_lld.c:109
void SSD1963_WriteArea(uint16_t x1, uint16_t y1, uint16_t x2, uint16_t y2, uint16_t *pData)
Write a array of data to the display.
Definition: ssd1963.c:301
Low level driver for the SSD1963 Graphic-Controller.
#define CMD_PLL_START
Definition: ssd1963_cmd.h:171
Driver for the SSD1963 Graphic-Controller.
#define CMD_SET_PCLK
Definition: ssd1963_cmd.h:177
static void SSD1963_WriteData(uint16_t data)
Write data to display controller.
Definition: ssd1963_lld.h:122
static void SSD1963_WriteCommand(uint16_t cmd)
Write command to display controller.
Definition: ssd1963_lld.h:114
static void SSD1963_DisplayOn(void)
SSD1963 changes the display state to ON state.
Definition: ssd1963.h:131
void SSD1963_WritePixel(uint16_t x, uint16_t y, uint16_t color)
Puts pixel.
Definition: ssd1963.c:215
static void SSD1963_Delay(uint32_t nCount)
Inserts a delay time.
Definition: ssd1963.c:100
Simple graphic library configuration.
Driver for the SSD1963 Graphic-Controller.
void SSD1963_SetArea(uint16_t x1, uint16_t y1, uint16_t x2, uint16_t y2)
defines start/end columns and start/end rows for memory access from host to SSD1963.
Definition: ssd1963.c:250
#define CMD_SOFT_RESET
Definition: ssd1963_cmd.h:80
void SSD1963_FillArea(uint16_t x1, uint16_t y1, uint16_t x2, uint16_t y2, uint16_t color)
Fill area of specified color.
Definition: ssd1963.c:276
void SSD1963_GetDeviceDescriptorBlock(uint16_t *ddb)
Get SSD1963 Device Descriptor Block.
Definition: ssd1963.c:346