can.c

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#ifdef __cplusplus
extern "C" {
#endif /* __cplusplus */

/*----- Header-Files -------------------------------------------------------*/
#include <string.h>                 /* Memory and string functions          */
#include <stdio.h>                  /* Standard input and output            */

#include <stm32f4xx.h>              /* Processor STM32F407IG                */
#include <carme.h>                  /* CARME Module                         */
#include <can_sja1000.h>            /* CAN Controller SJA1000 defines       */
#include <can.h>                    /* CARME CAN Module                     */

/*----- Macros -------------------------------------------------------------*/

/*----- Data types ---------------------------------------------------------*/

/*----- Function prototypes ------------------------------------------------*/
static void CARME_CAN_InitSTM(void);
static void CARME_CAN_SetBusTiming(uint8_t btr0, uint8_t btr1);

/*----- Data ---------------------------------------------------------------*/
static IRQ_CALLBACK CARME_CAN_IRQCallbacks[CARME_CAN_IRQID_COUNT];

/*----- Implementation -----------------------------------------------------*/

static void CARME_CAN_InitSTM(void) {

    GPIO_InitTypeDef GPIO_InitStruct;
    EXTI_InitTypeDef EXTI_InitStruct;
    NVIC_InitTypeDef NVIC_InitStruct;

    /* Initialize the GPIO */
    GPIO_StructInit(&GPIO_InitStruct);
    GPIO_InitStruct.GPIO_Pin = CARME_CAN_nCAN_INT_PIN;
    GPIO_InitStruct.GPIO_Mode = GPIO_Mode_IN;
    GPIO_InitStruct.GPIO_Speed = GPIO_Fast_Speed;
    GPIO_Init(CARME_CAN_nCAN_INT_PORT, &GPIO_InitStruct);

    /* Enable the external interrupt */
    SYSCFG_EXTILineConfig(CARME_GPIO_TO_EXTIPORTSOURCE(CARME_CAN_nCAN_INT_PORT),
            CARME_GPIO_TO_EXTIPINSOURCE(CARME_CAN_nCAN_INT_PIN));
    EXTI_InitStruct.EXTI_Line = CARME_GPIO_TO_EXTILINE(CARME_CAN_nCAN_INT_PIN);
    EXTI_InitStruct.EXTI_Mode = EXTI_Mode_Interrupt;
    EXTI_InitStruct.EXTI_Trigger = EXTI_Trigger_Falling;
    EXTI_InitStruct.EXTI_LineCmd = ENABLE;
    EXTI_Init(&EXTI_InitStruct);

    /* Enable and set EXTI Line8 Interrupt to the lowest priority */
    NVIC_InitStruct.NVIC_IRQChannel = CARME_CAN_nCAN_IRQn_CH;
    NVIC_InitStruct.NVIC_IRQChannelPreemptionPriority = 0x0F;
    NVIC_InitStruct.NVIC_IRQChannelSubPriority = 0x0F;
    NVIC_InitStruct.NVIC_IRQChannelCmd = ENABLE;
    NVIC_Init(&NVIC_InitStruct);
}

void CARME_CAN_Init(uint32_t baud, uint8_t flags) {

    uint8_t i;

    /* initialize global variables */
    memset(CARME_CAN_IRQCallbacks, 0, sizeof(CARME_CAN_IRQCallbacks));

    /* initialize stm32f4xx registers */
    CARME_CAN_InitSTM();

    /* bypass RX comparator and set PeliCAN mode */
    CARME_CAN_Write_Register(SJA1000_CDR,
                             SJA1000_CDR_CBP | SJA1000_CDR_CANMODE);

    /* output configuration, TX1: float, TX0: pushpull */
    CARME_CAN_Write_Register(SJA1000_OCR, 0x1a);

    /* set Baudrate */
    CARME_CAN_SetBaudrate(baud);

    /* configure acceptance filter to accept all CAN-Messages */
    for (i = 0; i < 4; i++) {
        CARME_CAN_Write_Register(SJA1000_ACR(i), 0x00); /* acceptance code  */
        CARME_CAN_Write_Register(SJA1000_AMR(i), 0xff); /* acceptance mask  */
    }

    CARME_CAN_Write_Register(SJA1000_IR, 0x00); /* clear all interrupts     */

    /* set the operation mode */
    i = 1;
    if (flags & CARME_CAN_DF_NORMAL) {
        i &= ~SJA1000_MOD_RM;           /* clear RM bit -> Normal Mode      */
    }
    if (flags & CARME_CAN_DF_LISTEN_ONLY) {
        i |= SJA1000_MOD_LOM;           /* set LOM bit -> Listen only mode  */
    }
    CARME_CAN_Write_Register(SJA1000_MOD, i);   /* switch in operating mode */
}

void CARME_CAN_InitI(uint32_t baud, uint8_t flags, uint32_t interrupts) {

    /* initialize normal settings, hold controller in Reset-Mode */
    CARME_CAN_Init(baud, CARME_CAN_DF_RESET);

    /* enable interrupts */
    CARME_CAN_Write_Register(SJA1000_IER, interrupts);

    CARME_CAN_SetMode(flags);
}

void CARME_CAN_RegisterIRQCallback(enum CARME_CAN_IRQ_CALLBACKS id,
                                   IRQ_CALLBACK pIRQCallback) {

    CARME_CAN_IRQCallbacks[id] = pIRQCallback;
}

void CARME_CAN_UnregisterIRQCallback(enum CARME_CAN_IRQ_CALLBACKS id) {

    CARME_CAN_IRQCallbacks[id] = NULL;
}

ERROR_CODES CARME_CAN_SetMode(uint8_t flags) {

    uint8_t mod = CARME_CAN_Read_Register(SJA1000_MOD);

    switch (flags) {
    case CARME_CAN_DF_NORMAL:
        mod &= ~SJA1000_MOD_RM;
        break;
    case CARME_CAN_DF_RESET:
        mod |= SJA1000_MOD_RM;
        break;
    default:
        return CARME_ERROR_CAN_INVALID_MODE;
    }
    CARME_CAN_Write_Register(SJA1000_MOD, mod); /* switch mode */

    return CARME_NO_ERROR;
}

ERROR_CODES CARME_CAN_Read(CARME_CAN_MESSAGE* rxMsg) {

    ERROR_CODES err = CARME_NO_ERROR;
    uint8_t sr = CARME_CAN_Read_Register(SJA1000_SR);

    if (sr & SJA1000_SR_ES) {
        err = CARME_ERROR_CAN_ERROR_STATUS;
    }

    if ((sr & SJA1000_SR_RBS) == 0) {
        err = CARME_ERROR_CAN_RXFIFO_EMPTY;
    }

    /* read first Frame Format Information */
    uint8_t ff = CARME_CAN_Read_Register(SJA1000_RX_BUF(0));

    /* Read Frame format */
    rxMsg->ext = (ff & SJA1000_FRAMEINFO_FF) != 0;

    /* read RTR */
    rxMsg->rtr = (ff & SJA1000_FRAMEINFO_RTR) != 0;

    /* read number of data bytes */
    rxMsg->dlc = ff & 0x0f;
    if (rxMsg->dlc > 8)
        rxMsg->dlc = 8;

    /* read identifier */
    if (rxMsg->ext) {
        rxMsg->id = CARME_CAN_Read_Register(SJA1000_RX_BUF(1)) << 21;
        rxMsg->id |= CARME_CAN_Read_Register(SJA1000_RX_BUF(2)) << 13;
        rxMsg->id |= CARME_CAN_Read_Register(SJA1000_RX_BUF(3)) << 5;
        rxMsg->id |= CARME_CAN_Read_Register(SJA1000_RX_BUF(4)) >> 3;
    }
    else {
        rxMsg->id = CARME_CAN_Read_Register(SJA1000_RX_BUF(1)) << 3;
        rxMsg->id |= CARME_CAN_Read_Register(SJA1000_RX_BUF(2)) >> 5;
    }

    /* read data bytes */
    int rxDataOffset;
    if (rxMsg->ext) {
        rxDataOffset = SJA1000_RX_BUF(5);
    }
    else {
        rxDataOffset = SJA1000_RX_BUF(3);
    }
    int i;
    for (i = 0; i < rxMsg->dlc; i++) {
        rxMsg->data[i] = CARME_CAN_Read_Register(rxDataOffset + i);
    }

    /* release buffer */
    CARME_CAN_Write_Register(SJA1000_CMR, SJA1000_CMR_RRB);
    return err;
}

void CARME_CAN_Interrupt_Handler(void) {

    uint8_t ir = CARME_CAN_Read_Register(SJA1000_IR);
    do {

        if (ir & SJA1000_IR_RI) {
            if (CARME_CAN_IRQCallbacks[CARME_CAN_IRQID_RX_INTERRUPT]) {
                CARME_CAN_IRQCallbacks[CARME_CAN_IRQID_RX_INTERRUPT]();
            }
        } else if (ir & SJA1000_IR_TI) {
            if (CARME_CAN_IRQCallbacks[CARME_CAN_IRQID_TX_INTERRUPT]) {
                CARME_CAN_IRQCallbacks[CARME_CAN_IRQID_TX_INTERRUPT]();
            }
        } else if (ir & SJA1000_IR_EI) {
            if (CARME_CAN_IRQCallbacks[CARME_CAN_IRQID_ERROR_INTERRUPT]) {
                CARME_CAN_IRQCallbacks[CARME_CAN_IRQID_ERROR_INTERRUPT]();
            }
        } else if (ir & SJA1000_IR_DOI) {
            if (CARME_CAN_IRQCallbacks[CARME_CAN_IRQID_DATAOVERFLOW_INTERRUPT]) {
                CARME_CAN_IRQCallbacks[CARME_CAN_IRQID_DATAOVERFLOW_INTERRUPT]();
            }
        } else if (ir & SJA1000_IR_WUI) {
            if (CARME_CAN_IRQCallbacks[CARME_CAN_IRQID_WAKEUP_INTERRUPT]) {
                CARME_CAN_IRQCallbacks[CARME_CAN_IRQID_WAKEUP_INTERRUPT]();
            }
        } else if (ir & SJA1000_IR_EPI) {
            if (CARME_CAN_IRQCallbacks[CARME_CAN_IRQID_PASSIVE_INTERRUPT]) {
                CARME_CAN_IRQCallbacks[CARME_CAN_IRQID_PASSIVE_INTERRUPT]();
            }
        } else if (ir & SJA1000_IR_ALI) {
            if (CARME_CAN_IRQCallbacks[CARME_CAN_IRQID_ARITRATION_LOST_INTERRUPT]) {
                CARME_CAN_IRQCallbacks[CARME_CAN_IRQID_ARITRATION_LOST_INTERRUPT]();
            }
        } else if (ir & SJA1000_IR_BEI) {
            if (CARME_CAN_IRQCallbacks[CARME_CAN_IRQID_BUS_ERROR_INTERRUPT]) {
                CARME_CAN_IRQCallbacks[CARME_CAN_IRQID_BUS_ERROR_INTERRUPT]();
            }
        }

        ir = CARME_CAN_Read_Register(SJA1000_IR);

    } while (ir);
}

static void CARME_CAN_SetBusTiming(uint8_t btr0, uint8_t btr1) {

    CARME_CAN_Write_Register(SJA1000_BTR0, btr0);
    CARME_CAN_Write_Register(SJA1000_BTR1, btr1);
}

ERROR_CODES CARME_CAN_SetBaudrate(uint32_t baud) {

    switch (baud) {
    case CARME_CAN_BAUD_125K:
        CARME_CAN_SetBusTiming(0x45, 0x1c);         /* 125k Baud    */
        break;
    case CARME_CAN_BAUD_250K:
        CARME_CAN_SetBusTiming(0x42, 0x1c);         /* 250k Baud    */
        break;
    case CARME_CAN_BAUD_500K:
        CARME_CAN_SetBusTiming(0x40, 0x6f);         /* 500k Baud    */
        break;
    case CARME_CAN_BAUD_1M:
        CARME_CAN_SetBusTiming(0x40, 0x09);         /* 1M Baud      */
        break;
    default:
        return CARME_ERROR_CAN_INVALID_BAUDRATE;
        break;
    }

    return CARME_NO_ERROR;
}

ERROR_CODES CARME_CAN_Write(CARME_CAN_MESSAGE* txMsg) {

    uint8_t sr;
    uint8_t i;
    uint8_t txDataOffset;

    /* wait until transmit buffer is free */
    do {

        sr = CARME_CAN_Read_Register(SJA1000_SR);
        if (sr & SJA1000_SR_ES) {
            return CARME_ERROR_CAN_ERROR_STATUS;
        }
    } while ((sr & SJA1000_SR_TBS) == 0);

    /* prepare frame format information */
    unsigned char ff = 0;
    if (txMsg->ext) {
        /* set FF bit for extended frame (EFF) */
        ff |= SJA1000_FRAMEINFO_FF;
    }

    if (txMsg->rtr) {
        ff |= SJA1000_FRAMEINFO_RTR;
    }

    ff |= txMsg->dlc & 0xff;

    /* write frame format information */
    CARME_CAN_Write_Register(SJA1000_TX_BUF(0), ff);

    /* write identifier bytes */
    if (txMsg->ext) {
        CARME_CAN_Write_Register(SJA1000_TX_BUF(1), (txMsg->id >> 21) & 0xff);
        CARME_CAN_Write_Register(SJA1000_TX_BUF(2), (txMsg->id >> 13) & 0xff);
        CARME_CAN_Write_Register(SJA1000_TX_BUF(3), (txMsg->id >> 5) & 0xff);
        CARME_CAN_Write_Register(SJA1000_TX_BUF(4), (txMsg->id << 3) & 0xf8);
    }
    else {
        CARME_CAN_Write_Register(SJA1000_TX_BUF(1), (txMsg->id >> 3) & 0xff);
        CARME_CAN_Write_Register(SJA1000_TX_BUF(2), (txMsg->id << 5) & 0xe0);
    }

    if (txMsg->ext) {
        txDataOffset = SJA1000_TX_BUF(5);
    }
    else {
        txDataOffset = SJA1000_TX_BUF(3);
    }
    for (i = 0; i < max(txMsg->dlc, 8); i++) {
        CARME_CAN_Write_Register(txDataOffset + i, txMsg->data[i]);
    }

    /* send data */
    CARME_CAN_Write_Register(SJA1000_CMR, SJA1000_CMR_TR);

    return CARME_NO_ERROR;
}

ERROR_CODES CARME_CAN_SetAcceptaceFilter(CARME_CAN_ACCEPTANCE_FILTER* af) {

    ERROR_CODES err = CARME_NO_ERROR;
    uint8_t mod;
    uint8_t i;

    if (!(CARME_CAN_Read_Register(SJA1000_MOD) & SJA1000_MOD_RM)) {
        err = CARME_ERROR_CAN_INVALID_OPMODE;
    }

    /* set/clear AFM bit in MOD register */
    mod = CARME_CAN_Read_Register(SJA1000_MOD);
    if (af->afm == MODE_SINGLE) {
        mod |= SJA1000_MOD_AFM;
    }
    else if (af->afm == MODE_DUAL) {
        mod &= ~SJA1000_MOD_AFM;
    }
    else {
        err = CARME_ERROR_CAN_INVALID_ACCEPTANCE_MODE;
    }
    CARME_CAN_Write_Register(SJA1000_MOD, mod);

    /* write to acceptance mask and code registers */
    for (i = 0; i < 4; i++) {
        CARME_CAN_Write_Register(SJA1000_ACR(i), af->acr[i]);
        CARME_CAN_Write_Register(SJA1000_AMR(i), af->amr[i]);
    }

    return err;
}

ERROR_CODES CARME_CAN_GetAcceptaceFilter(CARME_CAN_ACCEPTANCE_FILTER* af) {

    ERROR_CODES err = CARME_NO_ERROR;
    uint8_t mod;
    uint8_t i;

    if (!(CARME_CAN_Read_Register(SJA1000_MOD) & SJA1000_MOD_RM)) {
        err = CARME_ERROR_CAN_INVALID_OPMODE;
    }

    /* read AFM bit in MOD register */
    mod = CARME_CAN_Read_Register(SJA1000_MOD);
    if (mod & SJA1000_MOD_AFM) {
        af->afm = MODE_SINGLE;
    }
    else {
        af->afm = MODE_DUAL;
    }

    /* read acceptance mask and code registers */
    for (i = 0; i < 4; i++) {
        af->acr[i] = CARME_CAN_Read_Register(SJA1000_ACR(i));
        af->amr[i] = CARME_CAN_Read_Register(SJA1000_AMR(i));
    }

    return err;
}

#ifdef CARME_CAN_DEBUG

void CARME_CAN_PrintRegisters(void) {

    printf("PeliCAN Mode\n\r"
            "MOD = 0x%02x\n\r"
            "CMR = 0x%02x\n\r"
            "SR = 0x%02x\n\r"
            "IR = 0x%02x\n\r"
            "IER = 0x%02x\n\r"
            "OCR = 0x%02x\n\r"
            "BTR0 = 0x%02x\n\r"
            "BTR1 = 0x%02x\n\r"
            "RMC = 0x%02x\n\r"
            "RBSA = 0x%02x\n\r",
            CARME_CAN_Read_Register(SJA1000_MOD),
            CARME_CAN_Read_Register(SJA1000_CMR),
            CARME_CAN_Read_Register(SJA1000_SR),
            CARME_CAN_Read_Register(SJA1000_IR),
            CARME_CAN_Read_Register(SJA1000_IER),
            CARME_CAN_Read_Register(SJA1000_OCR),
            CARME_CAN_Read_Register(SJA1000_BTR0),
            CARME_CAN_Read_Register(SJA1000_BTR1),
            CARME_CAN_Read_Register(SJA1000_RMC),
            CARME_CAN_Read_Register(SJA1000_RBSA));
}

void CARME_CAN_GetRegisterString(char* pStr) {

    sprintf(pStr, "PeliCAN Mode\n\r"
            "MOD = 0x%02x\n\r"
            "CMR = 0x%02x\n\r"
            "SR = 0x%02x\n\r"
            "IR = 0x%02x\n\r"
            "IER = 0x%02x\n\r"
            "OCR = 0x%02x\n\r"
            "BTR0 = 0x%02x\n\r"
            "BTR1 = 0x%02x\n\r"
            "RMC = 0x%02x\n\r"
            "RBSA = 0x%02x\n\r"
            "RXERR = 0x%02x\n\r"
            "TXERR = 0x%02x\n\r",
            CARME_CAN_Read_Register(SJA1000_MOD),
            CARME_CAN_Read_Register(SJA1000_CMR),
            CARME_CAN_Read_Register(SJA1000_SR),
            CARME_CAN_Read_Register(SJA1000_IR),
            CARME_CAN_Read_Register(SJA1000_IER),
            CARME_CAN_Read_Register(SJA1000_OCR),
            CARME_CAN_Read_Register(SJA1000_BTR0),
            CARME_CAN_Read_Register(SJA1000_BTR1),
            CARME_CAN_Read_Register(SJA1000_RMC),
            CARME_CAN_Read_Register(SJA1000_RBSA),
            CARME_CAN_Read_Register(SJA1000_RXERR),
            CARME_CAN_Read_Register(SJA1000_TXERR));
}
#endif

#ifdef __cplusplus
}
#endif /* __cplusplus */