CARME-M4 BSP  V1.5

PWR driver modules. More...

+ Collaboration diagram for PWR:

Modules

 PWR_Exported_Constants
 
 PWR_Private_Functions
 

Macros

#define PWR_OFFSET   (PWR_BASE - PERIPH_BASE)
 
#define CR_OFFSET   (PWR_OFFSET + 0x00)
 
#define DBP_BitNumber   0x08
 
#define CR_DBP_BB   (PERIPH_BB_BASE + (CR_OFFSET * 32) + (DBP_BitNumber * 4))
 
#define PVDE_BitNumber   0x04
 
#define CR_PVDE_BB   (PERIPH_BB_BASE + (CR_OFFSET * 32) + (PVDE_BitNumber * 4))
 
#define FPDS_BitNumber   0x09
 
#define CR_FPDS_BB   (PERIPH_BB_BASE + (CR_OFFSET * 32) + (FPDS_BitNumber * 4))
 
#define PMODE_BitNumber   0x0E
 
#define CR_PMODE_BB   (PERIPH_BB_BASE + (CR_OFFSET * 32) + (PMODE_BitNumber * 4))
 
#define ODEN_BitNumber   0x10
 
#define CR_ODEN_BB   (PERIPH_BB_BASE + (CR_OFFSET * 32) + (ODEN_BitNumber * 4))
 
#define ODSWEN_BitNumber   0x11
 
#define CR_ODSWEN_BB   (PERIPH_BB_BASE + (CR_OFFSET * 32) + (ODSWEN_BitNumber * 4))
 
#define CSR_OFFSET   (PWR_OFFSET + 0x04)
 
#define EWUP_BitNumber   0x08
 
#define CSR_EWUP_BB   (PERIPH_BB_BASE + (CSR_OFFSET * 32) + (EWUP_BitNumber * 4))
 
#define BRE_BitNumber   0x09
 
#define CSR_BRE_BB   (PERIPH_BB_BASE + (CSR_OFFSET * 32) + (BRE_BitNumber * 4))
 
#define CR_DS_MASK   ((uint32_t)0xFFFFF3FC)
 
#define CR_PLS_MASK   ((uint32_t)0xFFFFFF1F)
 
#define CR_VOS_MASK   ((uint32_t)0xFFFF3FFF)
 

Functions

void PWR_DeInit (void)
 Deinitializes the PWR peripheral registers to their default reset values. More...
 
void PWR_BackupAccessCmd (FunctionalState NewState)
 Enables or disables access to the backup domain (RTC registers, RTC backup data registers and backup SRAM). More...
 
void PWR_PVDLevelConfig (uint32_t PWR_PVDLevel)
 Configures the voltage threshold detected by the Power Voltage Detector(PVD). More...
 
void PWR_PVDCmd (FunctionalState NewState)
 Enables or disables the Power Voltage Detector(PVD). More...
 
void PWR_WakeUpPinCmd (FunctionalState NewState)
 Enables or disables the WakeUp Pin functionality. More...
 
void PWR_BackupRegulatorCmd (FunctionalState NewState)
 Enables or disables the Backup Regulator. More...
 
void PWR_MainRegulatorModeConfig (uint32_t PWR_Regulator_Voltage)
 Configures the main internal regulator output voltage. More...
 
void PWR_OverDriveCmd (FunctionalState NewState)
 Enables or disables the Over-Drive. More...
 
void PWR_OverDriveSWCmd (FunctionalState NewState)
 Enables or disables the Over-Drive switching. More...
 
void PWR_UnderDriveCmd (FunctionalState NewState)
 Enables or disables the Under-Drive mode. More...
 
void PWR_FlashPowerDownCmd (FunctionalState NewState)
 Enables or disables the Flash Power Down in STOP mode. More...
 
void PWR_EnterSTOPMode (uint32_t PWR_Regulator, uint8_t PWR_STOPEntry)
 Enters STOP mode. More...
 
void PWR_EnterUnderDriveSTOPMode (uint32_t PWR_Regulator, uint8_t PWR_STOPEntry)
 Enters in Under-Drive STOP mode. More...
 
void PWR_EnterSTANDBYMode (void)
 Enters STANDBY mode. More...
 
FlagStatus PWR_GetFlagStatus (uint32_t PWR_FLAG)
 Checks whether the specified PWR flag is set or not. More...
 
void PWR_ClearFlag (uint32_t PWR_FLAG)
 Clears the PWR's pending flags. More...
 

Detailed Description

PWR driver modules.

Function Documentation

void PWR_BackupAccessCmd ( FunctionalState  NewState)

Enables or disables access to the backup domain (RTC registers, RTC backup data registers and backup SRAM).

Note
If the HSE divided by 2, 3, ..31 is used as the RTC clock, the Backup Domain Access should be kept enabled.
Parameters
NewStatenew state of the access to the backup domain. This parameter can be: ENABLE or DISABLE.
Return values
None

Definition at line 149 of file stm32f4xx_pwr.c.

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void PWR_BackupRegulatorCmd ( FunctionalState  NewState)

Enables or disables the Backup Regulator.

Parameters
NewStatenew state of the Backup Regulator. This parameter can be: ENABLE or DISABLE.
Return values
None

Definition at line 353 of file stm32f4xx_pwr.c.

void PWR_ClearFlag ( uint32_t  PWR_FLAG)

Clears the PWR's pending flags.

Parameters
PWR_FLAGspecifies the flag to clear. This parameter can be one of the following values:
  • PWR_FLAG_WU: Wake Up flag
  • PWR_FLAG_SB: StandBy flag
  • PWR_FLAG_UDRDY: Under-drive ready flag (STM32F42xxx/43xxx devices)
Return values
None

Definition at line 848 of file stm32f4xx_pwr.c.

void PWR_DeInit ( void  )

Deinitializes the PWR peripheral registers to their default reset values.

Parameters
None
Return values
None

Definition at line 134 of file stm32f4xx_pwr.c.

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void PWR_EnterSTANDBYMode ( void  )

Enters STANDBY mode.

Note
In Standby mode, all I/O pins are high impedance except for:
  • Reset pad (still available)
  • RTC_AF1 pin (PC13) if configured for tamper, time-stamp, RTC Alarm out, or RTC clock calibration out.
  • RTC_AF2 pin (PI8) if configured for tamper or time-stamp.
  • WKUP pin 1 (PA0) if enabled.
Parameters
None
Return values
None

Definition at line 757 of file stm32f4xx_pwr.c.

void PWR_EnterSTOPMode ( uint32_t  PWR_Regulator,
uint8_t  PWR_STOPEntry 
)

Enters STOP mode.

Note
In Stop mode, all I/O pins keep the same state as in Run mode.
When exiting Stop mode by issuing an interrupt or a wakeup event, the HSI RC oscillator is selected as system clock.
When the voltage regulator operates in low power mode, an additional startup delay is incurred when waking up from Stop mode. By keeping the internal regulator ON during Stop mode, the consumption is higher although the startup time is reduced.
Parameters
PWR_Regulatorspecifies the regulator state in STOP mode. This parameter can be one of the following values:
  • PWR_MainRegulator_ON: STOP mode with regulator ON
  • PWR_LowPowerRegulator_ON: STOP mode with low power regulator ON
PWR_STOPEntryspecifies if STOP mode in entered with WFI or WFE instruction. This parameter can be one of the following values:
  • PWR_STOPEntry_WFI: enter STOP mode with WFI instruction
  • PWR_STOPEntry_WFE: enter STOP mode with WFE instruction
Return values
None

Definition at line 645 of file stm32f4xx_pwr.c.

void PWR_EnterUnderDriveSTOPMode ( uint32_t  PWR_Regulator,
uint8_t  PWR_STOPEntry 
)

Enters in Under-Drive STOP mode.

Note
This mode is only available for STM32F42xxx/STM3243xxx devices.
This mode can be selected only when the Under-Drive is already active
In Stop mode, all I/O pins keep the same state as in Run mode.
When exiting Stop mode by issuing an interrupt or a wakeup event, the HSI RC oscillator is selected as system clock.
When the voltage regulator operates in low power mode, an additional startup delay is incurred when waking up from Stop mode. By keeping the internal regulator ON during Stop mode, the consumption is higher although the startup time is reduced.
Parameters
PWR_Regulatorspecifies the regulator state in STOP mode. This parameter can be one of the following values:
  • PWR_MainRegulator_UnderDrive_ON: Main Regulator in under-drive mode and Flash memory in power-down when the device is in Stop under-drive mode
  • PWR_LowPowerRegulator_UnderDrive_ON: Low Power Regulator in under-drive mode and Flash memory in power-down when the device is in Stop under-drive mode
PWR_STOPEntryspecifies if STOP mode in entered with WFI or WFE instruction. This parameter can be one of the following values:
  • PWR_STOPEntry_WFI: enter STOP mode with WFI instruction
  • PWR_STOPEntry_WFE: enter STOP mode with WFE instruction
Return values
None

Definition at line 709 of file stm32f4xx_pwr.c.

void PWR_FlashPowerDownCmd ( FunctionalState  NewState)

Enables or disables the Flash Power Down in STOP mode.

Parameters
NewStatenew state of the Flash power mode. This parameter can be: ENABLE or DISABLE.
Return values
None

Definition at line 499 of file stm32f4xx_pwr.c.

FlagStatus PWR_GetFlagStatus ( uint32_t  PWR_FLAG)

Checks whether the specified PWR flag is set or not.

Parameters
PWR_FLAGspecifies the flag to check. This parameter can be one of the following values:
  • PWR_FLAG_WU: Wake Up flag. This flag indicates that a wakeup event was received from the WKUP pin or from the RTC alarm (Alarm A or Alarm B), RTC Tamper event, RTC TimeStamp event or RTC Wakeup. An additional wakeup event is detected if the WKUP pin is enabled (by setting the EWUP bit) when the WKUP pin level is already high.
  • PWR_FLAG_SB: StandBy flag. This flag indicates that the system was resumed from StandBy mode.
  • PWR_FLAG_PVDO: PVD Output. This flag is valid only if PVD is enabled by the PWR_PVDCmd() function. The PVD is stopped by Standby mode For this reason, this bit is equal to 0 after Standby or reset until the PVDE bit is set.
  • PWR_FLAG_BRR: Backup regulator ready flag. This bit is not reset when the device wakes up from Standby mode or by a system reset or power reset.
  • PWR_FLAG_VOSRDY: This flag indicates that the Regulator voltage scaling output selection is ready.
  • PWR_FLAG_ODRDY: This flag indicates that the Over-drive mode is ready (STM32F42xxx/43xxx devices)
  • PWR_FLAG_ODSWRDY: This flag indicates that the Over-drive mode switcching is ready (STM32F42xxx/43xxx devices)
  • PWR_FLAG_UDRDY: This flag indicates that the Under-drive mode is enabled in Stop mode (STM32F42xxx/43xxx devices)
Return values
Thenew state of PWR_FLAG (SET or RESET).

Definition at line 820 of file stm32f4xx_pwr.c.

void PWR_MainRegulatorModeConfig ( uint32_t  PWR_Regulator_Voltage)

Configures the main internal regulator output voltage.

Parameters
PWR_Regulator_Voltagespecifies the regulator output voltage to achieve a tradeoff between performance and power consumption when the device does not operate at the maximum frequency (refer to the datasheets for more details). This parameter can be one of the following values:
  • PWR_Regulator_Voltage_Scale1: Regulator voltage output Scale 1 mode, System frequency up to 168 MHz.
  • PWR_Regulator_Voltage_Scale2: Regulator voltage output Scale 2 mode, System frequency up to 144 MHz.
  • PWR_Regulator_Voltage_Scale3: Regulator voltage output Scale 3 mode, System frequency up to 120 MHz (only for STM32F42xxx/43xxx devices)
Return values
None

Definition at line 375 of file stm32f4xx_pwr.c.

void PWR_OverDriveCmd ( FunctionalState  NewState)

Enables or disables the Over-Drive.

Note
This function can be used only for STM32F42xxx/STM3243xxx devices. This mode allows the CPU and the core logic to operate at a higher frequency than the normal mode for a given voltage scaling (scale 1, scale 2 or scale 3).
It is recommended to enter or exit Over-drive mode when the application is not running critical tasks and when the system clock source is either HSI or HSE. During the Over-drive switch activation, no peripheral clocks should be enabled. The peripheral clocks must be enabled once the Over-drive mode is activated.
Parameters
NewStatenew state of the Over Drive mode. This parameter can be: ENABLE or DISABLE.
Return values
None

Definition at line 410 of file stm32f4xx_pwr.c.

void PWR_OverDriveSWCmd ( FunctionalState  NewState)

Enables or disables the Over-Drive switching.

Note
This function can be used only for STM32F42xxx/STM3243xxx devices.
Parameters
NewStatenew state of the Over Drive switching mode. This parameter can be: ENABLE or DISABLE.
Return values
None

Definition at line 428 of file stm32f4xx_pwr.c.

void PWR_PVDCmd ( FunctionalState  NewState)

Enables or disables the Power Voltage Detector(PVD).

Parameters
NewStatenew state of the PVD. This parameter can be: ENABLE or DISABLE.
Return values
None

Definition at line 222 of file stm32f4xx_pwr.c.

void PWR_PVDLevelConfig ( uint32_t  PWR_PVDLevel)

Configures the voltage threshold detected by the Power Voltage Detector(PVD).

Parameters
PWR_PVDLevelspecifies the PVD detection level This parameter can be one of the following values:
  • PWR_PVDLevel_0
  • PWR_PVDLevel_1
  • PWR_PVDLevel_2
  • PWR_PVDLevel_3
  • PWR_PVDLevel_4
  • PWR_PVDLevel_5
  • PWR_PVDLevel_6
  • PWR_PVDLevel_7
Note
Refer to the electrical characteristics of your device datasheet for more details about the voltage threshold corresponding to each detection level.
Return values
None

Definition at line 197 of file stm32f4xx_pwr.c.

void PWR_UnderDriveCmd ( FunctionalState  NewState)

Enables or disables the Under-Drive mode.

Note
This function can be used only for STM32F42xxx/STM3243xxx devices.
This mode is enabled only with STOP low power mode. In this mode, the 1.2V domain is preserved in reduced leakage mode. This mode is only available when the main regulator or the low power regulator is in low voltage mode
If the Under-drive mode was enabled, it is automatically disabled after exiting Stop mode. When the voltage regulator operates in Under-drive mode, an additional startup delay is induced when waking up from Stop mode.
Parameters
NewStatenew state of the Under Drive mode. This parameter can be: ENABLE or DISABLE.
Return values
None

Definition at line 455 of file stm32f4xx_pwr.c.

void PWR_WakeUpPinCmd ( FunctionalState  NewState)

Enables or disables the WakeUp Pin functionality.

Parameters
NewStatenew state of the WakeUp Pin functionality. This parameter can be: ENABLE or DISABLE.
Return values
None

Definition at line 256 of file stm32f4xx_pwr.c.