stm32f4xx_dma.c File Reference

This file provides firmware functions to manage the following functionalities of the Direct Memory Access controller (DMA): More...

#include "stm32f4xx_dma.h"
#include "stm32f4xx_rcc.h"
+ Include dependency graph for stm32f4xx_dma.c:

Go to the source code of this file.


#define DMA_Stream0_IT_MASK
#define DMA_Stream1_IT_MASK   (uint32_t)(DMA_Stream0_IT_MASK << 6)
#define DMA_Stream2_IT_MASK   (uint32_t)(DMA_Stream0_IT_MASK << 16)
#define DMA_Stream3_IT_MASK   (uint32_t)(DMA_Stream0_IT_MASK << 22)
#define DMA_Stream4_IT_MASK   (uint32_t)(DMA_Stream0_IT_MASK | (uint32_t)0x20000000)
#define DMA_Stream5_IT_MASK   (uint32_t)(DMA_Stream1_IT_MASK | (uint32_t)0x20000000)
#define DMA_Stream6_IT_MASK   (uint32_t)(DMA_Stream2_IT_MASK | (uint32_t)0x20000000)
#define DMA_Stream7_IT_MASK   (uint32_t)(DMA_Stream3_IT_MASK | (uint32_t)0x20000000)
#define TRANSFER_IT_MASK   (uint32_t)0x0F3C0F3C
#define HIGH_ISR_MASK   (uint32_t)0x20000000
#define RESERVED_MASK   (uint32_t)0x0F7D0F7D


void DMA_DeInit (DMA_Stream_TypeDef *DMAy_Streamx)
 Deinitialize the DMAy Streamx registers to their default reset values. More...
void DMA_Init (DMA_Stream_TypeDef *DMAy_Streamx, DMA_InitTypeDef *DMA_InitStruct)
 Initializes the DMAy Streamx according to the specified parameters in the DMA_InitStruct structure. More...
void DMA_StructInit (DMA_InitTypeDef *DMA_InitStruct)
 Fills each DMA_InitStruct member with its default value. More...
void DMA_Cmd (DMA_Stream_TypeDef *DMAy_Streamx, FunctionalState NewState)
 Enables or disables the specified DMAy Streamx. More...
void DMA_PeriphIncOffsetSizeConfig (DMA_Stream_TypeDef *DMAy_Streamx, uint32_t DMA_Pincos)
 Configures, when the PINC (Peripheral Increment address mode) bit is set, if the peripheral address should be incremented with the data size (configured with PSIZE bits) or by a fixed offset equal to 4 (32-bit aligned addresses). More...
void DMA_FlowControllerConfig (DMA_Stream_TypeDef *DMAy_Streamx, uint32_t DMA_FlowCtrl)
 Configures, when the DMAy Streamx is disabled, the flow controller for the next transactions (Peripheral or Memory). More...
void DMA_SetCurrDataCounter (DMA_Stream_TypeDef *DMAy_Streamx, uint16_t Counter)
 Writes the number of data units to be transferred on the DMAy Streamx. More...
uint16_t DMA_GetCurrDataCounter (DMA_Stream_TypeDef *DMAy_Streamx)
 Returns the number of remaining data units in the current DMAy Streamx transfer. More...
void DMA_DoubleBufferModeConfig (DMA_Stream_TypeDef *DMAy_Streamx, uint32_t Memory1BaseAddr, uint32_t DMA_CurrentMemory)
 Configures, when the DMAy Streamx is disabled, the double buffer mode and the current memory target. More...
void DMA_DoubleBufferModeCmd (DMA_Stream_TypeDef *DMAy_Streamx, FunctionalState NewState)
 Enables or disables the double buffer mode for the selected DMA stream. More...
void DMA_MemoryTargetConfig (DMA_Stream_TypeDef *DMAy_Streamx, uint32_t MemoryBaseAddr, uint32_t DMA_MemoryTarget)
 Configures the Memory address for the next buffer transfer in double buffer mode (for dynamic use). This function can be called when the DMA Stream is enabled and when the transfer is ongoing. More...
uint32_t DMA_GetCurrentMemoryTarget (DMA_Stream_TypeDef *DMAy_Streamx)
 Returns the current memory target used by double buffer transfer. More...
FunctionalState DMA_GetCmdStatus (DMA_Stream_TypeDef *DMAy_Streamx)
 Returns the status of EN bit for the specified DMAy Streamx. More...
uint32_t DMA_GetFIFOStatus (DMA_Stream_TypeDef *DMAy_Streamx)
 Returns the current DMAy Streamx FIFO filled level. More...
FlagStatus DMA_GetFlagStatus (DMA_Stream_TypeDef *DMAy_Streamx, uint32_t DMA_FLAG)
 Checks whether the specified DMAy Streamx flag is set or not. More...
void DMA_ClearFlag (DMA_Stream_TypeDef *DMAy_Streamx, uint32_t DMA_FLAG)
 Clears the DMAy Streamx's pending flags. More...
void DMA_ITConfig (DMA_Stream_TypeDef *DMAy_Streamx, uint32_t DMA_IT, FunctionalState NewState)
 Enables or disables the specified DMAy Streamx interrupts. More...
ITStatus DMA_GetITStatus (DMA_Stream_TypeDef *DMAy_Streamx, uint32_t DMA_IT)
 Checks whether the specified DMAy Streamx interrupt has occurred or not. More...
void DMA_ClearITPendingBit (DMA_Stream_TypeDef *DMAy_Streamx, uint32_t DMA_IT)
 Clears the DMAy Streamx's interrupt pending bits. More...

Detailed Description

This file provides firmware functions to manage the following functionalities of the Direct Memory Access controller (DMA):

MCD Application Team
  • Initialization and Configuration
  • Data Counter
  • Double Buffer mode configuration and command
  • Interrupts and flags management
                      ##### How to use this driver #####
     (#) Enable The DMA controller clock using RCC_AHB1PeriphResetCmd(RCC_AHB1Periph_DMA1, ENABLE)
         function for DMA1 or using RCC_AHB1PeriphResetCmd(RCC_AHB1Periph_DMA2, ENABLE)
         function for DMA2.
     (#) Enable and configure the peripheral to be connected to the DMA Stream
         (except for internal SRAM / FLASH memories: no initialization is 
     (#) For a given Stream, program the required configuration through following parameters:   
         Source and Destination addresses, Transfer Direction, Transfer size, Source and Destination 
         data formats, Circular or Normal mode, Stream Priority level, Source and Destination 
         Incrementation mode, FIFO mode and its Threshold (if needed), Burst 
         mode for Source and/or Destination (if needed) using the DMA_Init() function.
         To avoid filling unneccessary fields, you can call DMA_StructInit() function
         to initialize a given structure with default values (reset values), the modify
         only necessary fields 
         (ie. Source and Destination addresses, Transfer size and Data Formats).
     (#) Enable the NVIC and the corresponding interrupt(s) using the function 
         DMA_ITConfig() if you need to use DMA interrupts. 
     (#) Optionally, if the Circular mode is enabled, you can use the Double buffer mode by configuring 
         the second Memory address and the first Memory to be used through the function 
         DMA_DoubleBufferModeConfig(). Then enable the Double buffer mode through the function
         DMA_DoubleBufferModeCmd(). These operations must be done before step 6.
     (#) Enable the DMA stream using the DMA_Cmd() function. 
     (#) Activate the needed Stream Request using PPP_DMACmd() function for
         any PPP peripheral except internal SRAM and FLASH (ie. SPI, USART ...)
         The function allowing this operation is provided in each PPP peripheral
         driver (ie. SPI_DMACmd for SPI peripheral).
         Once the Stream is enabled, it is not possible to modify its configuration
         unless the stream is stopped and disabled.
         After enabling the Stream, it is advised to monitor the EN bit status using
         the function DMA_GetCmdStatus(). In case of configuration errors or bus errors
         this bit will remain reset and all transfers on this Stream will remain on hold.      
     (#) Optionally, you can configure the number of data to be transferred
         when the Stream is disabled (ie. after each Transfer Complete event
         or when a Transfer Error occurs) using the function DMA_SetCurrDataCounter().
         And you can get the number of remaining data to be transferred using 
         the function DMA_GetCurrDataCounter() at run time (when the DMA Stream is
         enabled and running).  
     (#) To control DMA events you can use one of the following two methods:
       (##) Check on DMA Stream flags using the function DMA_GetFlagStatus().  
       (##) Use DMA interrupts through the function DMA_ITConfig() at initialization
            phase and DMA_GetITStatus() function into interrupt routines in
            communication phase.
         After checking on a flag you should clear it using DMA_ClearFlag()
         function. And after checking on an interrupt event you should 
         clear it using DMA_ClearITPendingBit() function.    
     (#) Optionally, if Circular mode and Double Buffer mode are enabled, you can modify
         the Memory Addresses using the function DMA_MemoryTargetConfig(). Make sure that
         the Memory Address to be modified is not the one currently in use by DMA Stream.
         This condition can be monitored using the function DMA_GetCurrentMemoryTarget().
     (#) Optionally, Pause-Resume operations may be performed:
         The DMA_Cmd() function may be used to perform Pause-Resume operation. 
         When a transfer is ongoing, calling this function to disable the 
         Stream will cause the transfer to be paused. All configuration registers 
         and the number of remaining data will be preserved. When calling again 
         this function to re-enable the Stream, the transfer will be resumed from 
         the point where it was paused.          
     -@- Memory-to-Memory transfer is possible by setting the address of the memory into
          the Peripheral registers. In this mode, Circular mode and Double Buffer mode
          are not allowed.
     -@- The FIFO is used mainly to reduce bus usage and to allow data 
          packing/unpacking: it is possible to set different Data Sizes for 
          the Peripheral and the Memory (ie. you can set Half-Word data size 
          for the peripheral to access its data register and set Word data size
          for the Memory to gain in access time. Each two Half-words will be 
          packed and written in a single access to a Word in the Memory).
     -@- When FIFO is disabled, it is not allowed to configure different 
          Data Sizes for Source and Destination. In this case the Peripheral 
          Data Size will be applied to both Source and Destination.               

© COPYRIGHT 2013 STMicroelectronics

Licensed under MCD-ST Liberty SW License Agreement V2, (the "License"); You may not use this file except in compliance with the License. You may obtain a copy of the License at:

Unless required by applicable law or agreed to in writing, software distributed under the License is distributed on an "AS IS" BASIS, WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the License for the specific language governing permissions and limitations under the License.

Definition in file stm32f4xx_dma.c.