Main and Backup Regulators configuration functions.
More...
Main and Backup Regulators configuration functions.
===============================================================================
##### Main and Backup Regulators configuration functions #####
===============================================================================
[..]
(+) The backup domain includes 4 Kbytes of backup SRAM accessible only from
the CPU, and address in 32-bit, 16-bit or 8-bit mode. Its content is
retained even in Standby or VBAT mode when the low power backup regulator
is enabled. It can be considered as an internal EEPROM when VBAT is
always present. You can use the PWR_BackupRegulatorCmd() function to
enable the low power backup regulator and use the PWR_GetFlagStatus
(PWR_FLAG_BRR) to check if it is ready or not.
(+) When the backup domain is supplied by VDD (analog switch connected to VDD)
the backup SRAM is powered from VDD which replaces the VBAT power supply to
save battery life.
(+) The backup SRAM is not mass erased by an tamper event. It is read
protected to prevent confidential data, such as cryptographic private
key, from being accessed. The backup SRAM can be erased only through
the Flash interface when a protection level change from level 1 to
level 0 is requested.
-@- Refer to the description of Read protection (RDP) in the reference manual.
(+) The main internal regulator can be configured to have a tradeoff between
performance and power consumption when the device does not operate at
the maximum frequency.
(+) For STM32F405xx/407xx and STM32F415xx/417xx Devices, the regulator can be
configured on the fly through PWR_MainRegulatorModeConfig() function which
configure VOS bit in PWR_CR register:
(++) When this bit is set (Regulator voltage output Scale 1 mode selected)
the System frequency can go up to 168 MHz.
(++) When this bit is reset (Regulator voltage output Scale 2 mode selected)
the System frequency can go up to 144 MHz.
(+) For STM32F42xxx/43xxx Devices, the regulator can be configured through
PWR_MainRegulatorModeConfig() function which configure VOS[1:0] bits in
PWR_CR register:
which configure VOS[1:0] bits in PWR_CR register:
(++) When VOS[1:0] = 11 (Regulator voltage output Scale 1 mode selected)
the System frequency can go up to 168 MHz.
(++) When VOS[1:0] = 10 (Regulator voltage output Scale 2 mode selected)
the System frequency can go up to 144 MHz.
(++) When VOS[1:0] = 01 (Regulator voltage output Scale 3 mode selected)
the System frequency can go up to 120 MHz.
(+) For STM32F42xxx/43xxx Devices, the scale can be modified only when the PLL
is OFF and the HSI or HSE clock source is selected as system clock.
The new value programmed is active only when the PLL is ON.
When the PLL is OFF, the voltage scale 3 is automatically selected.
Refer to the datasheets for more details.
(+) For STM32F42xxx/43xxx Devices, in Run mode: the main regulator has
2 operating modes available:
(++) Normal mode: The CPU and core logic operate at maximum frequency at a given
voltage scaling (scale 1, scale 2 or scale 3)
(++) Over-drive mode: This mode allows the CPU and the core logic to operate at a
higher frequency than the normal mode for a given voltage scaling (scale 1,
scale 2 or scale 3). This mode is enabled through PWR_OverDriveCmd() function and
PWR_OverDriveSWCmd() function, to enter or exit from Over-drive mode please follow
the sequence described in Reference manual.
(+) For STM32F42xxx/43xxx Devices, in Stop mode: the main regulator or low power regulator
supplies a low power voltage to the 1.2V domain, thus preserving the content of registers
and internal SRAM. 2 operating modes are available:
(++) Normal mode: the 1.2V domain is preserved in nominal leakage mode. This mode is only
available when the main regulator or the low power regulator is used in Scale 3 or
low voltage mode.
(++) Under-drive mode: the 1.2V domain is preserved in reduced leakage mode. This mode is only
available when the main regulator or the low power regulator is in low voltage mode.
This mode is enabled through PWR_UnderDriveCmd() function.
| void PWR_BackupRegulatorCmd |
( |
FunctionalState |
NewState | ) |
|
Enables or disables the Backup Regulator.
- Parameters
-
| NewState | new state of the Backup Regulator. This parameter can be: ENABLE or DISABLE. |
- Return values
-
Definition at line 353 of file stm32f4xx_pwr.c.
| void PWR_MainRegulatorModeConfig |
( |
uint32_t |
PWR_Regulator_Voltage | ) |
|
Configures the main internal regulator output voltage.
- Parameters
-
| PWR_Regulator_Voltage | specifies the regulator output voltage to achieve a tradeoff between performance and power consumption when the device does not operate at the maximum frequency (refer to the datasheets for more details). This parameter can be one of the following values:
- PWR_Regulator_Voltage_Scale1: Regulator voltage output Scale 1 mode, System frequency up to 168 MHz.
- PWR_Regulator_Voltage_Scale2: Regulator voltage output Scale 2 mode, System frequency up to 144 MHz.
- PWR_Regulator_Voltage_Scale3: Regulator voltage output Scale 3 mode, System frequency up to 120 MHz (only for STM32F42xxx/43xxx devices)
|
- Return values
-
Definition at line 375 of file stm32f4xx_pwr.c.
| void PWR_OverDriveCmd |
( |
FunctionalState |
NewState | ) |
|
Enables or disables the Over-Drive.
- Note
- This function can be used only for STM32F42xxx/STM3243xxx devices. This mode allows the CPU and the core logic to operate at a higher frequency than the normal mode for a given voltage scaling (scale 1, scale 2 or scale 3).
-
It is recommended to enter or exit Over-drive mode when the application is not running critical tasks and when the system clock source is either HSI or HSE. During the Over-drive switch activation, no peripheral clocks should be enabled. The peripheral clocks must be enabled once the Over-drive mode is activated.
- Parameters
-
| NewState | new state of the Over Drive mode. This parameter can be: ENABLE or DISABLE. |
- Return values
-
Definition at line 410 of file stm32f4xx_pwr.c.
| void PWR_OverDriveSWCmd |
( |
FunctionalState |
NewState | ) |
|
Enables or disables the Over-Drive switching.
- Note
- This function can be used only for STM32F42xxx/STM3243xxx devices.
- Parameters
-
| NewState | new state of the Over Drive switching mode. This parameter can be: ENABLE or DISABLE. |
- Return values
-
Definition at line 428 of file stm32f4xx_pwr.c.
| void PWR_UnderDriveCmd |
( |
FunctionalState |
NewState | ) |
|
Enables or disables the Under-Drive mode.
- Note
- This function can be used only for STM32F42xxx/STM3243xxx devices.
-
This mode is enabled only with STOP low power mode. In this mode, the 1.2V domain is preserved in reduced leakage mode. This mode is only available when the main regulator or the low power regulator is in low voltage mode
-
If the Under-drive mode was enabled, it is automatically disabled after exiting Stop mode. When the voltage regulator operates in Under-drive mode, an additional startup delay is induced when waking up from Stop mode.
- Parameters
-
| NewState | new state of the Under Drive mode. This parameter can be: ENABLE or DISABLE. |
- Return values
-
Definition at line 455 of file stm32f4xx_pwr.c.
Collaboration diagram for Main and Backup Regulators configuration functions:
1.8.10