85 #define SECTOR_MASK ((uint32_t)0xFFFFFF07)
251 assert_param(IS_FLASH_LATENCY(FLASH_Latency));
266 assert_param(IS_FUNCTIONAL_STATE(NewState));
269 if(NewState != DISABLE)
271 FLASH->ACR |= FLASH_ACR_PRFTEN;
275 FLASH->ACR &= (~FLASH_ACR_PRFTEN);
288 assert_param(IS_FUNCTIONAL_STATE(NewState));
290 if(NewState != DISABLE)
292 FLASH->ACR |= FLASH_ACR_ICEN;
296 FLASH->ACR &= (~FLASH_ACR_ICEN);
309 assert_param(IS_FUNCTIONAL_STATE(NewState));
311 if(NewState != DISABLE)
313 FLASH->ACR |= FLASH_ACR_DCEN;
317 FLASH->ACR &= (~FLASH_ACR_DCEN);
329 FLASH->ACR |= FLASH_ACR_ICRST;
340 FLASH->ACR |= FLASH_ACR_DCRST;
387 if((FLASH->CR & FLASH_CR_LOCK) != RESET)
390 FLASH->KEYR = FLASH_KEY1;
391 FLASH->KEYR = FLASH_KEY2;
403 FLASH->CR |= FLASH_CR_LOCK;
439 uint32_t tmp_psize = 0x0;
443 assert_param(IS_FLASH_SECTOR(FLASH_Sector));
444 assert_param(IS_VOLTAGERANGE(VoltageRange));
448 tmp_psize = FLASH_PSIZE_BYTE;
452 tmp_psize = FLASH_PSIZE_HALF_WORD;
456 tmp_psize = FLASH_PSIZE_WORD;
460 tmp_psize = FLASH_PSIZE_DOUBLE_WORD;
465 if(status == FLASH_COMPLETE)
468 FLASH->CR &= CR_PSIZE_MASK;
469 FLASH->CR |= tmp_psize;
470 FLASH->CR &= SECTOR_MASK;
471 FLASH->CR |= FLASH_CR_SER | FLASH_Sector;
472 FLASH->CR |= FLASH_CR_STRT;
478 FLASH->CR &= (~FLASH_CR_SER);
479 FLASH->CR &= SECTOR_MASK;
507 uint32_t tmp_psize = 0x0;
512 assert_param(IS_VOLTAGERANGE(VoltageRange));
516 tmp_psize = FLASH_PSIZE_BYTE;
520 tmp_psize = FLASH_PSIZE_HALF_WORD;
524 tmp_psize = FLASH_PSIZE_WORD;
528 tmp_psize = FLASH_PSIZE_DOUBLE_WORD;
530 if(status == FLASH_COMPLETE)
533 #if defined (STM32F427_437xx) || defined (STM32F429_439xx)
534 FLASH->CR &= CR_PSIZE_MASK;
535 FLASH->CR |= tmp_psize;
536 FLASH->CR |= (FLASH_CR_MER1 | FLASH_CR_MER2);
537 FLASH->CR |= FLASH_CR_STRT;
543 FLASH->CR &= ~(FLASH_CR_MER1 | FLASH_CR_MER2);
546 #if defined (STM32F40_41xxx) || defined (STM32F401xx)
547 FLASH->CR &= CR_PSIZE_MASK;
548 FLASH->CR |= tmp_psize;
549 FLASH->CR |= FLASH_CR_MER;
550 FLASH->CR |= FLASH_CR_STRT;
556 FLASH->CR &= (~FLASH_CR_MER);
588 uint32_t tmp_psize = 0x0;
593 assert_param(IS_VOLTAGERANGE(VoltageRange));
597 tmp_psize = FLASH_PSIZE_BYTE;
601 tmp_psize = FLASH_PSIZE_HALF_WORD;
605 tmp_psize = FLASH_PSIZE_WORD;
609 tmp_psize = FLASH_PSIZE_DOUBLE_WORD;
611 if(status == FLASH_COMPLETE)
614 FLASH->CR &= CR_PSIZE_MASK;
615 FLASH->CR |= tmp_psize;
616 FLASH->CR |= FLASH_CR_MER1;
617 FLASH->CR |= FLASH_CR_STRT;
623 FLASH->CR &= (~FLASH_CR_MER1);
655 uint32_t tmp_psize = 0x0;
660 assert_param(IS_VOLTAGERANGE(VoltageRange));
664 tmp_psize = FLASH_PSIZE_BYTE;
668 tmp_psize = FLASH_PSIZE_HALF_WORD;
672 tmp_psize = FLASH_PSIZE_WORD;
676 tmp_psize = FLASH_PSIZE_DOUBLE_WORD;
678 if(status == FLASH_COMPLETE)
681 FLASH->CR &= CR_PSIZE_MASK;
682 FLASH->CR |= tmp_psize;
683 FLASH->CR |= FLASH_CR_MER2;
684 FLASH->CR |= FLASH_CR_STRT;
690 FLASH->CR &= (~FLASH_CR_MER2);
715 assert_param(IS_FLASH_ADDRESS(Address));
720 if(status == FLASH_COMPLETE)
723 FLASH->CR &= CR_PSIZE_MASK;
724 FLASH->CR |= FLASH_PSIZE_DOUBLE_WORD;
725 FLASH->CR |= FLASH_CR_PG;
727 *(__IO uint64_t*)Address = Data;
733 FLASH->CR &= (~FLASH_CR_PG);
758 assert_param(IS_FLASH_ADDRESS(Address));
763 if(status == FLASH_COMPLETE)
766 FLASH->CR &= CR_PSIZE_MASK;
767 FLASH->CR |= FLASH_PSIZE_WORD;
768 FLASH->CR |= FLASH_CR_PG;
770 *(__IO uint32_t*)Address = Data;
776 FLASH->CR &= (~FLASH_CR_PG);
800 assert_param(IS_FLASH_ADDRESS(Address));
805 if(status == FLASH_COMPLETE)
808 FLASH->CR &= CR_PSIZE_MASK;
809 FLASH->CR |= FLASH_PSIZE_HALF_WORD;
810 FLASH->CR |= FLASH_CR_PG;
812 *(__IO uint16_t*)Address = Data;
818 FLASH->CR &= (~FLASH_CR_PG);
842 assert_param(IS_FLASH_ADDRESS(Address));
847 if(status == FLASH_COMPLETE)
850 FLASH->CR &= CR_PSIZE_MASK;
851 FLASH->CR |= FLASH_PSIZE_BYTE;
852 FLASH->CR |= FLASH_CR_PG;
854 *(__IO uint8_t*)Address = Data;
860 FLASH->CR &= (~FLASH_CR_PG);
938 if((FLASH->OPTCR & FLASH_OPTCR_OPTLOCK) != RESET)
941 FLASH->OPTKEYR = FLASH_OPT_KEY1;
942 FLASH->OPTKEYR = FLASH_OPT_KEY2;
954 FLASH->OPTCR |= FLASH_OPTCR_OPTLOCK;
979 assert_param(IS_OB_WRP(OB_WRP));
980 assert_param(IS_FUNCTIONAL_STATE(NewState));
984 if(status == FLASH_COMPLETE)
986 if(NewState != DISABLE)
1021 assert_param(IS_OB_WRP(OB_WRP));
1022 assert_param(IS_FUNCTIONAL_STATE(NewState));
1026 if(status == FLASH_COMPLETE)
1028 if(NewState != DISABLE)
1068 uint8_t optiontmp = 0xFF;
1071 assert_param(IS_OB_PCROP_SELECT(OB_PcROP));
1101 assert_param(IS_OB_PCROP(OB_PCROP));
1102 assert_param(IS_FUNCTIONAL_STATE(NewState));
1106 if(status == FLASH_COMPLETE)
1108 if(NewState != DISABLE)
1138 assert_param(IS_OB_PCROP(OB_PCROP));
1139 assert_param(IS_FUNCTIONAL_STATE(NewState));
1143 if(status == FLASH_COMPLETE)
1145 if(NewState != DISABLE)
1178 if(status == FLASH_COMPLETE)
1203 uint8_t optiontmp = 0xFF;
1207 assert_param(IS_OB_IWDG_SOURCE(OB_IWDG));
1208 assert_param(IS_OB_STOP_SOURCE(OB_STOP));
1209 assert_param(IS_OB_STDBY_SOURCE(OB_STDBY));
1214 if(status == FLASH_COMPLETE)
1216 #if defined (STM32F427_437xx) || defined (STM32F429_439xx)
1221 #if defined (STM32F40_41xxx) || defined (STM32F401xx)
1227 *(__IO uint8_t *)
OPTCR_BYTE0_ADDRESS = OB_IWDG | (uint8_t)(OB_STDBY | (uint8_t)(OB_STOP | ((uint8_t)optiontmp)));
1245 assert_param(IS_OB_BOOT(OB_BOOT));
1266 assert_param(IS_OB_BOR(OB_BOR));
1302 return (uint8_t)(FLASH->OPTCR >> 5);
1367 FlagStatus readstatus = RESET;
1421 assert_param(IS_FLASH_IT(FLASH_IT));
1422 assert_param(IS_FUNCTIONAL_STATE(NewState));
1424 if(NewState != DISABLE)
1427 FLASH->CR |= FLASH_IT;
1432 FLASH->CR &= ~(uint32_t)FLASH_IT;
1452 FlagStatus bitstatus = RESET;
1454 assert_param(IS_FLASH_GET_FLAG(FLASH_FLAG));
1456 if((FLASH->SR & FLASH_FLAG) != (uint32_t)RESET)
1484 assert_param(IS_FLASH_CLEAR_FLAG(FLASH_FLAG));
1487 FLASH->SR = FLASH_FLAG;
1502 flashstatus = FLASH_BUSY;
1508 flashstatus = FLASH_ERROR_WRP;
1514 flashstatus = FLASH_ERROR_RD;
1518 if((FLASH->SR & (uint32_t)0xEF) != (uint32_t)0x00)
1520 flashstatus = FLASH_ERROR_PROGRAM;
1526 flashstatus = FLASH_ERROR_OPERATION;
1530 flashstatus = FLASH_COMPLETE;
1556 while(status == FLASH_BUSY)
void FLASH_DataCacheCmd(FunctionalState NewState)
Enables or disables the Data Cache feature.
void FLASH_InstructionCacheCmd(FunctionalState NewState)
Enables or disables the Instruction Cache feature.
void FLASH_OB_Lock(void)
Locks the FLASH Option Control Registers access.
void FLASH_ITConfig(uint32_t FLASH_IT, FunctionalState NewState)
Enables or disables the specified FLASH interrupts.
#define OPTCR_BYTE2_ADDRESS
OPTCR register byte 2 (Bits[23:16]) base address.
void FLASH_OB_BORConfig(uint8_t OB_BOR)
Sets the BOR Level.
FLASH_Status FLASH_ProgramByte(uint32_t Address, uint8_t Data)
Programs a byte (8-bit) at a specified address.
void FLASH_ClearFlag(uint32_t FLASH_FLAG)
Clears the FLASH's pending flags.
FLASH_Status FLASH_WaitForLastOperation(void)
Waits for a FLASH operation to complete.
FLASH_Status FLASH_OB_Launch(void)
Launch the option byte loading.
#define OPTCR_BYTE0_ADDRESS
OPTCR register byte 0 (Bits[7:0]) base address.
void FLASH_DataCacheReset(void)
Resets the Data Cache.
void FLASH_InstructionCacheReset(void)
Resets the Instruction Cache.
This file contains all the functions prototypes for the FLASH firmware library.
FLASH_Status FLASH_EraseAllBank2Sectors(uint8_t VoltageRange)
Erases all FLASH Sectors in Bank 2.
void FLASH_SetLatency(uint32_t FLASH_Latency)
Sets the code latency value.
void FLASH_OB_UserConfig(uint8_t OB_IWDG, uint8_t OB_STOP, uint8_t OB_STDBY)
Programs the FLASH User Option Byte: IWDG_SW / RST_STOP / RST_STDBY.
FLASH_Status FLASH_ProgramDoubleWord(uint32_t Address, uint64_t Data)
Programs a double word (64-bit) at a specified address.
FLASH_Status FLASH_EraseSector(uint32_t FLASH_Sector, uint8_t VoltageRange)
Erases a specified FLASH Sector.
void FLASH_OB_RDPConfig(uint8_t OB_RDP)
Sets the read protection level.
void FLASH_OB_WRPConfig(uint32_t OB_WRP, FunctionalState NewState)
Enables or disables the write protection of the desired sectors, for the first 1 Mb of the Flash...
uint16_t FLASH_OB_GetPCROP1(void)
Returns the FLASH PC Read/Write Protection Option Bytes value.
FLASH_Status FLASH_ProgramHalfWord(uint32_t Address, uint16_t Data)
Programs a half word (16-bit) at a specified address.
FLASH_Status FLASH_EraseAllBank1Sectors(uint8_t VoltageRange)
Erases all FLASH Sectors in Bank 1.
FlagStatus FLASH_OB_GetRDP(void)
Returns the FLASH Read Protection level.
FLASH_Status FLASH_ProgramWord(uint32_t Address, uint32_t Data)
Programs a word (32-bit) at a specified address.
void FLASH_Lock(void)
Locks the FLASH control register access.
void FLASH_OB_PCROPConfig(uint32_t OB_PCROP, FunctionalState NewState)
Enables or disables the read/write protection (PCROP) of the desired sectors, for the first 1 MB of t...
uint16_t FLASH_OB_GetPCROP(void)
Returns the FLASH PC Read/Write Protection Option Bytes value.
#define FLASH_FLAG_WRPERR
FLASH_Status FLASH_EraseAllSectors(uint8_t VoltageRange)
Erases all FLASH Sectors.
void FLASH_OB_BootConfig(uint8_t OB_BOOT)
Configure the Dual Bank Boot.
void FLASH_Unlock(void)
Unlocks the FLASH control register access.
uint8_t FLASH_OB_GetBOR(void)
Returns the FLASH BOR level.
uint8_t FLASH_OB_GetUser(void)
Returns the FLASH User Option Bytes values.
void FLASH_OB_PCROPSelectionConfig(uint8_t OB_PcROP)
Select the Protection Mode (SPRMOD).
#define OPTCR1_BYTE2_ADDRESS
OPTCR1 register byte 0 (Bits[7:0]) base address.
#define OPTCR_BYTE3_ADDRESS
OPTCR register byte 3 (Bits[31:24]) base address.
void FLASH_OB_Unlock(void)
Unlocks the FLASH Option Control Registers access.
FLASH_Status FLASH_GetStatus(void)
Returns the FLASH Status.
void FLASH_OB_WRP1Config(uint32_t OB_WRP, FunctionalState NewState)
Enables or disables the write protection of the desired sectors, for the second 1 Mb of the Flash...
uint16_t FLASH_OB_GetWRP1(void)
Returns the FLASH Write Protection Option Bytes value.
void FLASH_PrefetchBufferCmd(FunctionalState NewState)
Enables or disables the Prefetch Buffer.
FlagStatus FLASH_GetFlagStatus(uint32_t FLASH_FLAG)
Checks whether the specified FLASH flag is set or not.
void FLASH_OB_PCROP1Config(uint32_t OB_PCROP, FunctionalState NewState)
Enables or disables the read/write protection (PCROP) of the desired sectors.
FLASH_Status
FLASH Status.
#define ACR_BYTE0_ADDRESS
ACR register byte 0 (Bits[7:0]) base address.
uint16_t FLASH_OB_GetWRP(void)
Returns the FLASH Write Protection Option Bytes value.
#define OPTCR_BYTE1_ADDRESS
OPTCR register byte 1 (Bits[15:8]) base address.